Our 3rd RISC-V Workshop was held at the Oracle Conference Center in Redwood Shores, CA January 5-6, 2016. The Workshop agenda is shown below along with the presentation slides and videos from each talk as well as summaries from each of the Breakout Sessions.
About
The goals of this workshop are for the community to share information about recent activity in the various RISC-V projects underway around the globe, and to build consensus on future steps with the RISC-V ISA and the launch of the RISC-V Foundation. This workshop features talks and poster presentations conveying recent activity in the RISC-V community at large, collected during an open submission period.
Agenda
Tuesday, January 5th, 2016
| Time | Event | Speaker, Affiliation | Media |
| 8:30am | Breakfast | ||
| 9:30am | Introductions and RISC-V Foundation Overview | Rick O’Connor, RISC-V | Slides | Video |
| 10:00am | RISC-V Updates | Krste Asanović, UC Berkeley | Slides | Video |
| 10:30am | RISC-V External Debug Support | Tim Newsome, SiFive | Slides | Video |
| 11:00am | Networking Break | ||
| 11:30am | RISC-V in AXIOM – First Fully Open Source 4K Film-making Camera | Michael Gielda, Antmicro | Slides | Video |
| 11:45am | Emulating Future HPC SoC Architectures Using RISC-V | Farzad Fatollahi-Fard, Lawrence Berkeley National Lab | Slides | Video |
| 12:15pm | GRVI-Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator |
Jan Gray, Gray Research | Slides | Video |
| 12:45pm | Networking Lunch | ||
| 1:45pm | Coreboot on RISC-V | Ron Minnich, Google | Slides | Video |
| 2:15pm | RISC-V and UEFI | Dong Wei and Abner Chang, HPE | Slides | Video |
| 2:45pm | FreeBSD and RISC-V | Ruslan Bukin, University of Cambridge | Slides | Video |
| 3:15pm | Building the RISC-V Software Ecosystem | Arun Thomas, BAE Systems | Slides | Video |
| 3:30pm | RISC-V Foundation Technical & Marketing Committees Task Groups Breakout Planning |
Rick O’Connor, RISC-V | Video |
| 3:45pm | Networking Break & Breakout Sessions | ||
| 4:45pm | Breakout Summaries & Poster Previews | Rick O’Connor, RISC-V | Breakouts | Video |
| 5:00pm | Networking Reception, Posters Sessions & Demos | ||
| 7:00pm | Adjourn – Conference Center Closes at 7:00pm sharp |
Wednesday, January 6th, 2016
| Time | Event | Speaker, Affiliation | Media |
| 8:15am | Breakfast | ||
| 9:00am | RISC-V ASIC & FPGA Implementations | Richard Herveille, ROA Logic | Slides | Video |
| 9:30am | lowRISC: plans for RISC-V in 2016 | Alex Bradbury, lowRISC / University of Cambridge | Slides | Video |
| 9:45am | A 32-bit 100MHz RISC-V Microcontroller with 10-bit SAR ADC in 130nm GP CMOS |
Elkim Roa, Universidad Industrial de Santander | Slides | Video |
| 10:00am | SoC for a Satellite Navigation Unit based on the RISC-V single-core Rocket chip |
Sergei Khabarov, Moscow Institute of Physics and Technology | Slides | Video |
| 10:15am | RISC-V Photonic Processor | Chen Sun, UC Berkeley | Slides | Video |
| 10:45am | Networking Break & Group Photo | ||
| 11:15am | Untethering the RISC-V Rocket Chip | Wei Song, University of Cambridge | Slides | Video |
| 11:30am | MIT’s Riscy Expedition | Andy Wright, MIT | Slides | Video |
| 11:45am | Pydgin: An Extensible Instruction-Set Simulator for RISC-V | Berkin Ilbeyi, Cornell University | Slides | Video |
| 12:00pm | ORCA: FPGA-Optimized RISC V Soft Processors | Guy Lemieux, VectorBlox Computing | Slides | Video |
| 12:15pm | Networking Lunch | ||
| 1:15pm | PULPino: A small single-core RISC-V SoC | Andreas Traber, ETH Zurich | Slides | Video |
| 1:45pm | The Berkeley Out-of-Order Machine (BOOM): An Open-Source, Industry Competitive, Synthesizable, Parameterized RISC-V Processor |
Christopher Celio, UC Berkeley | Slides | Video |
| 2:15pm | Bluespec “RISC-V Factory” (components and development/verification environment) | Rishiyur Nikhil, Bluespec | Slides | Video |
| 2:30pm | DOVER: A Metadata-extended RISC-V | Andre DeHon, DRAPER Labs | Slides | Video |
| 3:00pm | Networking Break | ||
| 3:30pm | Foundation Sponsors Meeting | Rick O’Connor, RISC-V | |
| 4:30pm | Summary & Wrap Up | Rick O’Connor, RISC-V | |
| 5:00pm | Workshop Ends |