7th RISC-V Workshop Recap

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Workshop Proceedings & Recap

Thanks to everyone who attended the 7th RISC-V Workshop! With 515 attendees this was our biggest event yet, showcasing the incredible growth and momentum of the RISC-V ecosystem.

To view the Workshop proceedings, including the slides and video from every session, please visit: https://riscv.org/2017/12/7th-risc-v-workshop-proceedings/

We were excited to see the news unveiled by member companies announcing new solutions and partnerships, and a strong commitment to the RISC-V ISA. Below you’ll find a recap of these announcements and highlights of the media coverage that has appeared in various publications such as EE Times, eWeek and Forbes.

Sharing a special thanks to the Western Digital team for hosting the Workshop and doing a fantastic job of preparing for and helping us run the event.

We would also like to give a shout out to Antmicro and SiFive for their collaboration in designing the RISC-V Electronic Badge for speakers and press.

 

Ecosystem News

Andes Announces Advanced SoC Development Environment For V5 AndesCore™ N25 And NX25 Processors With Tool Partners

Codasip Announces Bk5-64, A New 64-Bit RISC-V Processor

Esperanto Technologies Plans Energy-Efficient Chips For Artificial Intelligence And Machine Learning, Based On The Open RISC-V Standard

Intrinsix Cryptographic IP Selected By DARPA For Use In CHIPS Program, Featuring RISC-V Security Processor

Reduced Energy Microsystems Joins RISC-V Foundation

Renode 1.2 With RISC-V Support To Be Presented At 7th RISC-V Workshop

RISC-V Processor Developer Suite Announced By Imperas

SEGGER Embedded Studio Supports RISC-V Architecture

SiFive Advances Custom Silicon Industry With New Partnerships, Products At 7th RISC-V Workshop

SiFive Joins FDXcelerator Program To Bring RISC-V Core IP To GLOBALFOUNDRIES’ 22FDX Process Technology

SiFive And Microsemi Expand Relationship With Strategic Roadmap Alignment And A Linux-Capable, RISC-V Development Board

Western Digital To Accelerate The Future Of Next Generation Computing Architectures For Big Data And Fast Data Environments

 

Coverage Highlights

                                          

                                        

                                       

 

All About Circuits: SiFive Building RISC-V Ecosystem, One Partnership At A Time eWeek: How WD Plans to Lead Major Changeover to RISC-V Processing
Bit-Tech: Western Digital Announces Planned RISC-V Data-Processing Products Forbes: RISC-V Enables Smart Storage Devices
CDR Info: Western Digital To Bring RISC-V Processors Into Drives, AI Forbes: Western Digital Gives A Billion Unit Boost To Open Source RISC-V CPU
Data Economy: Western Digital Steps Up Game In The Cloud Data Centre And Edge Computing Markets New Electronics: SiFive’s RISC-V Cores Available On 22FDX Process
Design News: Western Digital Transitions to RISC-V Open-Source Architecture for Big Data, IoT PC Perspective: PCPer Mailbag #20 – 12/1/2017
EE Design News Europe: Development System Support For RISC-V Architecture Phoronix: Western Digital To Begin Shipping Devices Using RISC-V
EE News Europe: Segger Embedded Studio: RISC-V Edition Semiconductor Engineering: The Week In Review: Design
EE Times: RISC-V Spins Into Drives, AI Semiconductor Engineering: The Week In Review: Manufacturing
EENews Europe: Startup Plans 4k RISC-V Cores On 7nm Chip SemiWiki: RISC-V Business
Electronic Design: The Rise Of RISC-V On Display At Workshop Tech Design Forum: Workshop Sees The RISC-V Ecosystem Expand
Electronics Weekly: RISC-V Gunning For Arm At The High-End  The Register: WDC To Move All Its Stuff To RISC-V Processors, Build Some Kind Of Super Data-Wrangling Stack
Embedded Computing Design: Esperanto Technologies To Develop Energy-Efficient AI chips On RISC-V Architecture Tom’s Hardware: Big Tech Players Start To Adopt The RISC-V Chip Architecture
Embedded Computing Design: Five Minutes With…Rick O’Connor, Executive Director, RISC-V Foundation 
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