RISC-V Workshop in Barcelona Recap

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Workshop Proceedings & Recap

Thanks to everyone who attended the RISC-V Workshop in Barcelona! With 325 attendees, this was our biggest event outside of Silicon Valley, demonstrating the momentum of the RISC-V Foundation and the growth of the ecosystem in Europe.

We were excited to see the news unveiled by member companies announcing new solutions and partnerships, and a strong commitment to the RISC-V ISA. Below you’ll find a recap of these announcements and highlights of the media coverage that has appeared in various publications such as TechCrunch, EE Journal, Electronics Weekly and Embedded Computing Design.

We would like to share a special thanks to Barcelona Supercomputing Center (BSC) and Universitat Politècnica de Catalunya (UPC) for co-hosting the Workshop, and to NXP and Western Digital for co-sponsoring the successful event.

To view the Workshop proceedings, including the slides from the sessions, please visit:
https://riscv.org/2018/05/risc-v-workshop-in-barcelona-proceedings/

 

Ecosystem News

Andes Technology Corp. To Make Two Presentations At The 2018 RISC-V Workshop In Barcelona

Antmicro Reveals Partnership With Thales On The Disruptive RISC-V Open ISA

Express Logic’s X-Ware IoT Platform® Brings Industrial-Grade IoT Device Connectivity To The AndesCore™ N25 And NX25 RISC-V Processors

Microsemi And SiFive Launch HiFive Unleashed Expansion Board, Enabling Linux Software and Firmware Developers To Build RISC-V PCs For The First Time

NetSpeed And Esperanto Partner To Power SoCs For Artificial Intelligence

SiFive Announces Investment From Intel Capital

SiFive Challenge Calls For RISC-V Hardware Innovations

UltraSoC Analytics IP Selected By Esperanto Technologies For RISC-V Many-core Parallel Processing In AI And ML Applications

Coverage Highlights

 

 

Antmicro Reveals Partnership With Thales On The Disruptive RISC-V Open ISA Intel Capital Invests More Than $70 mln In 12 Startups
Barcelona RISC-V Workshop: Day One Intel Capital Pumps $72M Into AI, IoT, Cloud And Silicon Startups, $115M Invested So Far In 2018
Barcelona RISC-V Workshop: Day Two Intel Increases AI, Chip Investments 
Develop Your Linux Apps On This RISC-V Board Mateo Valero On How RISC-V Can Play A Major Role In New Supercomputer Architectures
Enabling Linux Software And Firmware Developers To Build RISC-V PCs For The First Time Partners Pump SoCs For AI
Esperanto To Use UltraSoC Analytics Renode Website Launch And 64-bit Linux-enabled RISC-V Support Announced In Barcelona
Expansion Board Broadens Capabilities of RISC-V Development Board RISC-V Workshop: Security, Scalability, And Super Mario
Express Logic’s X-Ware IoT Platform Brings Industrial-Grade IoT Device Connectivity To The AndesCore N25 And NX25 RISC-V Processors SiFive Challenge Calls For RISC-V Hardware Innovations
Express Logic’s X-Ware IoT Platform® Brings Industrial-Grade IoT Device Connectivity To The AndesCore™ N25 And NX25 RISC-V Processors Surveying The Free And Open Source RISC-V Ecosystem
Express Logic Announces X-Ware IoT Platform Support For AndesCore N25 And NX25 RISC-V Processors The Week In Review: Design
HiFive-Unleashed Expansion Board Opens Door For RISC-V PCs Top Five From RISC-V
Intel Capital Invests In RISC-V Start-up SiFive UltraSoC Helps Esperanto Design 4k Processor Chip

Video Highlights

Happening Now! RISC-V Is In The Rise – eeNews Report From The RISC-V Workshop In Barcelona RISC-V Has Supercomputer Powers
Hardware Is From Mars, Software Is From Venus – eeNews Interview With Rob Oshana, VP Software Engineering NXP At The RISC-V Workshop In Barcelona The Value Is In The Data. eeNews Interview With Martin Fink, CTO Of Western Digital At The RISC-V Workshop
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