RISC-V Day in Shanghai

RISC-V Day in Shanghai

June 30, 2018

 

The RISC-V Foundation invites you to attend RISC-V Day in Shanghai, China on June 30, 2018. Hosted by Fudan University in Shanghai, the event will include in-depth technical presentations and updates on the RISC-V architecture, a speaking lineup from leading technology companies and research institutions in the RISC-V ecosystem and ample opportunity for networking.

The RISC-V Day in Shanghai agenda will be categorized into the following topics: Commercial/Open Source RISC-V Implementations, RISC-V Architecture, RISC-V Security and RISC-V Ecosystem. For more information, please visit the event page here.

To register for the event, please click here.

Agenda: Saturday, June 30, 2018

 

Time Event Speaker, Affiliation
8:00 am Registration & Networking
8:45 am Status of RISC-V Foundation and APAC Group 开场介绍:RISC-V基金会及其APAC小组最新进展
9:00 am Comprehensive RISC-V Solutions for AioT 面向AIoT的基于RISC-V的完整解决方案 Charlie Su, Andes Technology Corporation
9:30 am The SCR Family of RISC-V Compatible Processor IP 兼容RISC-V的SCR处理器系列IP核 Pavel Khabarov, Syntacore
10:00 am Introducing the New IP Series by SiFive 来自SiFive的全新IP系列 Jack Kang, SiFive
10:30 am Networking Break 茶歇
11:00 am Ultra-Low-Power Open-Source Core to Boost the Spread of RISC-V in China 超低功耗开源处理器核助力RISC-V在中国的爆发 Bob Hu, Open Source HummingBird E203 RISC-V Processor Core Group
11:30 am Enhancements to Tools for Automated Generation of RISC-V Processors 增强的RISC-V处理器自动化生成工具 Zdenek Prikryl, Codasip
11:45 am Panel Discussion 圆桌讨论
12:15 pm Networking Lunch 午餐
1:30 pm Using RISC-V in high computing, ultra-low power, programmable circuits for inference on battery operated edge devices 面向边缘计算的,基于RISC-V的高性能、超低功耗应用处理器及其架构 Eric Flamand, Greenwaves Technologies
2:00 pm OpenPrefetch: Let There Be Industry-Competitive Prefetching in RISC-V Processors OpenPrefetch – 构造一个工业级的RISC-V处理器预取方案 Bowen Huang, Institute of Computing Technology, Chinese Academy of Sciences and Yungang Bao, ICT
2:15 pm Ways to Reduce RISC-V Soft Processor Footprint 减少RISC-V软核处理器资源占用的若干方法 Ruigang Wan, Chengdu University
2:30 pm Firmware Freedom: Coreboot for RISC-V 自由的固件: Coreboot的RISC-V移植 Xiang Wang, TYA infotech and Shawn Chang, HardenedLinux
3:15 pm Networking Break 茶歇
3:45 pm Fedora on RISC-V – Status update Fedora在RISC-V上的最新进展 Wei Fu, Red Hat
4:15 pm SylixOS (SMP RTOS) running on RISC-V 面向对称多处理器的RTOS SylixOS的RISC-V移植 JinXing Jiao, ACOINFO
4:45 pm RT-Thread/RISC-V RT-Thread的RISC-V移植 Yongxiang Liang, RT Thread and Bernard Xiong, RT Thread
5:00 pm Deep Learning showcased on RISC-V with Linux using the Mi-V Unleashed kit 在Mi-V Unleashed Kit上的基于Linux/RISC-V的深度学习演示 Krishnakumar R, Microsemi
5:30 pm Perf-V creative board designed for the RISC-V community with future ecosystem support 为RISC-V社区设计的Perf-V创意开发板及其未来生态支持 Hualong Zhao, Perfxlab company
5:45 pm Closing Session 总结

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