The RISC-V Foundation, the non-profit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), today presented Daniel Lustig, chairman of the RISC-V Memory Model Task Group and renowned research scientist at NVIDIA Corporation, with the inaugural RISC-V Foundation Board of Directors’ Award. This annual award recognizes RISC-V community members for their dedicated leadership and continued technical contributions to advancing the RISC-V ISA.
As a Chairman of the RISC-V Memory Model Task Group, Lustig led a team of industry and academic experts in defining the RISC-V Memory Consistency Model. Lustig is a Senior Research Scientist at NVIDIA Corporation known for his expertise in computer architecture, with a particular focus on system architecture, memory system design and memory consistency models.
“I am honored to receive the first RISC-V Foundation Board of Directors’ Award,” said Lustig. “The RISC-V Foundation’s open-source approach is changing the way the industry collaborates – creating an ecosystem and community like no other – allowing the best experts from academia and industry to build, create and deliver. Thank you to the Board for this honor.”
The Chairman of the RISC-V Foundation Board Krste Asanović congratulated Lustig, saying, “He led an all-star team that tackled what is certainly the most complex part of any ISA design, resulting in a formal specification that is now ratified by the Board and that will provide a solid foundation for all future RISC-V implementations and software stacks. Through many long and arduous discussions, Daniel provided both leadership and technical contributions in the development of the RISC-V Memory Consistency Model. We thank Daniel for his sterling service and are delighted to recognize him with this inaugural award.”
Lustig formally received the 2018 RISC-V Foundation Board of Directors’ Award at the RISC-V Summit on Dec. 4, 2018 at the Santa Clara Convention Center.
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About RISC-V Foundation
RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V Foundation comprises more than 200 members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V Foundation have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem. More information can be found at www.riscv.org.
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