China Times Article: Andes Technology Held RISC-V Forum In May To Promote Open Source Instruction Set Architecture

CPU IP provider of Andes Technology strongly promoted the open source instruction set architecture (ISA) RISC-V. To strengthen the industry’s cooperation on RISC-V, the RISC-V CON Forum will be held on May 9, 2019 to expand potential RISC-V customers.

The open source instruction set architecture RISC-V has sprung up in recent years and has evolved into a new generation of mainstream embedded processor technology with a rich ecosystem and growing emerging applications. Andes Technology, which specializes in RISC-V architecture, will help IC design companies launch RISC-V ISA-based innovations faster, and will host the RISC-V CON Forum on May 9, 2019.

 

To read more, please visit: https://www.chinatimes.com/realtimenews/20190412003236-260410?chdtv. Please note that the original article is in Chinese.

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