SiFive, the leading provider of commercial RISC-V processor IP and custom SoC solutions, today announced it has successfully taped out an IP enablement platform in 7nm FinFET technology that includes critical IP validation for SiFive’s high bandwidth memory (HBM2E) 3.2Gbps interface, 2GHz Ternary Content-Addressable Memory (TCAM) partner IP, a low-voltage differential signaling (LVDS) interface and other key IP building blocks. The high-speed IP interface enablement platform is the first in a series of SiFive’s next-generation platforms for high-performance and high-bandwidth applications. The forthcoming 7nm IP enablement platforms are:
- HBM2E 2.5D ASIC SiP based on SiFive’s RISC-V Core IP with vector extension, TileLink – a high-performance, scalable, cache-coherent fabric; high-performance caches; HBM2E controller and PHY; support for low latency HBM memory; DMA and peripherals.
- Customizable Freedom Revolution AI SoC platform based on SiFive’s 64-bit U7 and S7 Series RISC-V Multi-Core IP, TileLink, accelerator bays to connect a custom accelerator into the system, security IP, LPDDR5, an HBME controller and PHY, a PCIe5 SerDes and 56/112G SerDes.