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RISC-V Sessions at DAC 2019 in Las Vegas

By May 22, 2019October 1st, 2020No Comments

RISC-V Foundation members will be out in full force at Design Automation Conference (DAC) 2019, taking place from June 2-6 in Las Vegas, talking about interesting developments and innovations in the RISC-V ecosystem.
Read on to find out more about the RISC-V sessions taking place at the show. Plus, see if you can spot the RISC-V logos in members’ booths throughout the show floor!
 

New Frontiers in Formal and Static Verification 

Monday, June 3, 10:30 a.m. to Noon | N262 (Session 2)
2.4 Unbounded Formal Verification of RISC‑V CSRs with Interval Property Checking
Speaker: Nicolae Tusinschi, OneSpin Solutions GmbH
Authors: Nicolae Tusinschi and Sven Beyer, OneSpin Solutions GmbH
 

Cooley’s DAC Troublemaker Panel

Monday, June 3, 3 p.m. to 4 p.m. | N250
Moderator: John Cooley, Deepchip
Panelists: Joe Sawicki, Mentor, a Siemens Business; Joe Costello, Metrics Technology, Inc.; Naveed Sherwani, SiFive; Anirudh Devgan, Cadence Design Systems, Inc.; Mystery Guest
 

RISC-V Core & SoC Compliance, Verification, Customization

Monday, June 3, 4 p.m. to 5 p.m. (Verification Academy Booth #617)
Chair: Dennis Brophy, Mentor
Speaker: Larry Lapides, Imperas Software
 

Embedded Systems, Security, and Tool-chain

Tuesday, June 4, 10:30 a.m. to Noon | N262 (Session 18)
Chair: Natraj Ekambaram, NXP Semiconductors
18.3: RISC-­V Software & Toolchain
Speaker & Author: Palmer Dabbelt, SiFive, Inc.
 

Open Source ISAs – Will the IP Industry Find Commercial Success?

Tuesday, June 4, 10:30 a.m. to Noon | N264 (Session 19)
Moderator: Eric Dewannain, Samsung Semiconductor, Inc.
Organizer: Randy Fish, UltraSoC Technologies Ltd.
Panelists: Jerry Ardizzone, Codasip Ltd.; Bobe Simovich, Broadcom Corp.; Emerson Hsiao, Andes Technology Corp.; Steve Brightfield, Wave Computing; Kamakoti Veezhinathan, Indian Institute of Technology Madras
 

Hardware Security 2.0: Towards Next-Generation Secure and Intelligent CPUs and SoCs

Tuesday, June 4, 1:30 p.m. to 3:00 p.m. | N261 (Session 27)
27.3: Protecting RISC-V against Side-Channel Attacks
Speaker: Elke De Mulder, Rambus Cryptography Research Division
Authors: Elke De Mulder, Samatha Gummalla and Michael Hutter, Rambus Cryptography Research Division
 

IP to Secure Devices in a Hostile World

Tuesday, June 4, 1:30 p.m. to 3:00 p.m. | N264 (Session 29)
Chair: Henning Spruth, NXP Semiconductors
29.2: Building a Complete IoT Security Solution with a Hardware Root of Trust
Speaker & Author: Ben Levine, Rambus Inc.
 
29.3 Is There A Hole In Your Security Stack?
Speaker & Author: Marco Ciaffi, Dover Microsystems, Inc.
 

The Growing Ubiquity of Open Source Hardware and Software for Embedded Systems

Wednesday, June 5, 10:30 a.m. to Noon| N262 (Session 48)
48.1: Comparing RISC-V Open Source Implementations
Speaker: Rishiyur Nikhil, Bluespec, Inc.
Authors: Rishiyur Nikhil and Charlie Hauck Bluespec, Inc.
 
48.2: FreeRTOS for Microcontrollers and the IoT
Speaker & Author: Richard Barry, Amazon Development Center
 

RISC-V Opportunities and Challenges in an “Open” Technology Society

Wednesday, June 5, 2:00 p.m. to 2:45 p.m. | DAC Pavilion, Booth 871
Moderator: Ed Sperling, Semiconductor Engineering
Organizer: Robert Oshana, NXP Semiconductors
Panelists: Jerry Ardizzone, Codasip Ltd.; Rishiyur Nikhil, Bluespec, Inc.; Megan Wachs, SiFive, Inc.; Benjamin Levine, Rambus Security Division; Markus Levy, NXP Semiconductors
 

Secure Open-Source Hardware: Hype or Reality?

Wednesday, June 5, 3:30 p.m. to 5:30 p.m. | N259 (Session 65)
Moderator: Ahmad-Reza Sadeghi, Technische Univ.
Organizer: Saverio Fazzari, Defense Advanced Research Projects Agency
Panelists: Frank McKeen, Intel Corp.; Eric Keiter, Sandia National Laboratories; Nele Mentens, Katholieke Univ.; Larry Lapides, Imperas Software
 
 

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