Elektroniktidningen Article: Taiwanese Risc-V With Extras

Andes 32-bit Risc-V core N22 is available for free testing and research. It is also possible to license it in volume.

The N22 is a configurable CPU with selectable support for interrupt, local memory, instruction cache, debugging and Arms open IP block bus AHB. The latter includes a number of standard peripheral cores to connect to AHB.

The core is small and the pipeline is just two steps, but it delivers 3.95 Coremark / MHz, which according to Andes, is best in its class.

 

To read more, please visit: http://www.etn.se/index.php/produkt/65898-andes-erbjuder-licenserad-risc-v.html. Please note that the original article is in Swedish.

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