RISC-V comes with a new set of instructions that promises scalability from microcontrollers to supercomputers and offers user-defined scalability, allowing companies to differentiate themselves with custom instructions. The RISC-V Foundation today announced the ratification of the RISC-V base ISA and privileged architecture specifications. The RISC-V base architecture is the interface between application software and hardware. Software that’s coded to this specification will continue to work on RISC-V processors in perpetuity, even as the architecture evolves through the development of new extensions.
To read more, please visit https://hardware.developpez.com/actu/269487/La-fondation-RISC-V-annonce-la-ratification-des-specifications-ISA-de-base-RISC-V-et-de-l-architecture-privilegiee/. Please note that the original article is in French.