Imperas code morphing simulation technology, virtual platforms and tools used by lead customers for early software development and high-level architectural exploration
Oxford, United Kingdom, December 4th, 2019 — Imperas Software Ltd., the leader in virtual platforms and high-performance software simulation, today announced with Andes Technology Corporation, the close collaboration with lead customers for the latest Andes Vectors Core NX27V, which addresses the requirement for advanced ML (machine learning) and AI (artificial intelligence) applications. Using Imperas models and tools allows system designers to evaluate advanced SoC architectural analysis of many core designs using virtual platforms and full software application workloads, instead of limited benchmarks or test cases.
The Vector extensions are designed to support complex arithmetic operations required for applications involving linear algebra, such as supercomputers, cryptography, AI, ML and deep learning (DL). A traditional or scalar ISA is based around operations on single data items, a Vector processor operates over an array of data items which enables acceleration of key computational workloads.
“Andes has announced the new RISC-V family 27-series cores, which in addition to new and advanced features, include the new Vector extensions that are an ideal solution for our customers working on leading edge design for AI and ML,” said Charlie Hong-Men Su, CTO and Executive Vice President at Andes Technology Corp. “Andes is pleased to certify the Imperas model and simulator as a reference for the new Vector processor NX27V, and is already actively used by our mutual customers.”
“With the EoML (End of Moore’s Law), SoC developers are increasingly looking at architectural exploration and innovations to gain operational efficiency and application acceleration,” said Simon Davidmann, president and CEO of Imperas Software Ltd. “With the latest Andes cores supporting Vectors and custom instruction extensions, our mutual customers and partners can fully evaluate key hardware design options and configurations using complete software application workloads.”
Imperas will demonstrate solutions and tools for RISC-V including models and virtual platforms, at the upcoming RISC‑V Summit in San Jose next week, more details are available here.
The riscvOVPsim solution is an entry ramp for development, as well as a compliance testing tool. For developers of more advanced RISC-V designs, who need multi-core support and advanced debug, verification and analysis tools, or those who add their own instructions, Imperas offers advanced tools. Imperas also offers full-capability virtual platforms of many popular leading RISC-V platforms. Further details are available at www.imperas.com/riscv.
Imperas is revolutionizing the development of embedded software and systems and is the leading provider of RISC-V processor models and virtual prototype solutions. Imperas, along with Open Virtual Platforms (OVP), promotes open source model availability for a spectrum of processors, IP vendors, CPU architectures, system IP and reference platform models of processors and systems ranging from simple single core bare metal platforms to full heterogeneous multi-core systems booting SMP Linux. All models are available from Imperas at www.imperas.com and the Open Virtual Platforms (OVP) website.
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