The three-day conference will feature keynotes, exhibitions, smaller breakout sessions, tutorials and networking receptions
WHAT: The RISC-V Foundation has announced the agenda for the RISC-V Summit 2019
WHERE: San Jose Convention Center in San Jose, Calif.
WHEN: Monday, Dec. 9 to Thursday, Dec. 12, 2019
DETAILS: The RISC-V Foundation, in partnership with Informa’s Tech Division of Informa PLC, is hosting its annual RISC-V Summit, a four-day conference featuring keynotes, smaller breakout sessions, tutorials, exhibitions and networking receptions, as well as member meetings to open the week’s events. Leading technology companies and research institutions will share notable product updates, projects and implementations and discuss how the RISC-V ISA is driving the next generation of hardware, software and IP. The keynotes for the RISC-V Summit will include representatives from Arm, IBM, Microchip, OpenHW Group, SiFive and Western Digital.
RISC-V Summit activities are as follows:
- Monday, Dec. 9, 2019 – Only open to RISC-V Foundation member companies.
- Tuesday and Wednesday, Dec. 10-11, 2019 – The main conference will take place on these two days, with keynotes in the morning followed by breakout sessions and networking events.
- Thursday, Dec. 12, 2019 – The last day of the RISC-V Summit will include technical tutorials, highlighting RISC-V implementations across a variety of industries.
Below is the preliminary agenda. For the latest agenda updates and schedule, please visit: https://tmt.knect365.com/risc-v-summit/agenda/1.
Tuesday, Dec. 10, 2019 RISC-V Summit Agenda
Wednesday, Dec. 11, 2019 RISC-V Summit Agenda
Thursday, Dec. 12, 2019 RISC-V Summit Agenda
The Summit’s Exhibit Hall will be open at the following times to showcase RISC-V-based product demonstrations and allow attendees to explore the latest innovations in the market:
Tuesday, Dec. 10, 2019:
- 11:30 a.m. – 7:00 p.m. PST
Wednesday, Dec. 11, 2019:
- 11:30 a.m. – 4:00 p.m. PST
Please note promotional pricing for the three-day Conference and Exhibition Pass is available until Friday, Oct. 18, 2019. Platinum, Gold and Silver level members of the RISC-V Foundation qualify for discount codes. To learn more about the packages and limited-time promotions, please visit: https://tmt.knect365.com/risc-v-summit/purchase/select-package.
Sponsorship packages and exhibition packages are also available, see details here. For press interested in attending, please email: firstname.lastname@example.org to receive your complimentary pass.
About RISC-V Foundation
RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V Foundation comprises more than 325 members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V Foundation have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.