Intrinsic ID Security Summit

The Intrinsic ID Security Summit on October 7 will include Hex Five founder and CEO Cesare Galati. Register today to hear expert speakers and network with security professionals.For more information, see the event site.

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Security in the Age of RISC-V: Bay Area Meetup Oct 1

Rambus will host a security session related to RISC-V on October 1, 2019.Agenda 6:00-6:45 Networking Reception 6:45-7:00 Microchip – Rich Newell or Ted Speers (Secure RISC-V SoC FPGA) 7:00-7:15 Draper 7:15-7:30 QuickLogic 7:30-7:45 Rambus – Helena Handschuh (RISC-V & Security Overview) 7:45-8:00 Riscure 8:00-8:15 Foundries.io 8:15 Q & AFor more information, see the meetup page. Hope to see you there!

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RISC-V Week in Paris, October 1-3

After the first 1st RISC-V Meeting on academic opportunities held in Grenoble in October 2018, the second edition will take place in Paris on October 1st and 2nd 2019. They are open to the academic and industrial worlds and they will address several important topics: The impact of the arrival of open-source on the design of systems on a chip (SoC), embedded systems or cyber-physics (CPS). Legal and strategic intellectual property (IP) issues, ranging…

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RISC-V Training in Munich

ETH Zurich announces a RISC-V training session with Florian Zaruba, ETH, on 16-17 October, 2019 in ETH’s publishing house in Munich. Register now for the 2-day intensive training with top-class speakers from ETH Zurich and Greenwaves!The training addresses the practical implementation of processor cores with RISC-V instruction sets using the “PULP Platform” of ETH Zurich as an example. The focus is on the two cores “RI5CY” and “Ariane” – both…

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RISC-V Day Tokyo Agenda

The RISC-V Association (RVA), an interim community formed by employees from RISC-V Foundation members, is hosting the RISC-V Day Tokyo on Sept. 30, 2019 at the Hitachi Baba Hall in Kokobunji, Tokyo from 9 a.m. – 8 p.m. JST. During the event, the speakers will cover a variety of topics such as lowering the barrier to silicon, edge server security, open source CPU and subsystem, open source EDA tools, and…

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RISC-V Foundation Announces Agenda for “Getting Started with RISC-V” Roadshow in EMEA

 The roadshow will feature live demonstrations and presentations from RISC-V Foundation members, includes free admissionWHAT: The RISC-V Foundation has announced the agenda for its “Getting Started with RISC-V” events across Europe and the Middle East.WHERE: Tel Aviv, Israel; Munich, Germany; Berlin, Germany; Tallinn, Estonia; Paris, France; London, United Kingdom.WHEN: Monday, Sept. 16 to Thursday, Sept. 26, 2019DETAILS: The RISC-V Foundation, in collaboration with the Linux Foundation, is hosting a series…

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RISC-V Foundation Announces Call For Papers And Registration Promotions For Inaugural RISC-V Summit

Discounts on Conference and Exhibition Passes Available Now Through Sept. 17WHAT: RISC-V Summit in Santa Clara, Calif.WHERE: Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, Calif., 95054WHEN: Monday, Dec. 3 to Thursday, Dec. 6, 2018DETAILS: The RISC-V Foundation, in partnership with Informa’s Knowledge & Networking Division, KNect365, will hold its first annual RISC-V Summit at the Santa Clara Convention Center from Dec. 3-6, 2018. The Summit will be a major international…

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RISC-V Foundation Announces Agenda For RISC-V Workshop In Chennai

Workshop features more than 20 speaking sessions and a keynote from Western Digital WHAT: RISC-V Workshop in Chennai, IndiaWHERE: IC&SR Building, Indian Institute of Technology (IIT) Madras, Sardar Patel Road, Opposite to C, L.R.I, Adyar, Chennai, Tamil Nadu 600036, IndiaWHEN: Wednesday, July 18 and Thursday, July 19, 2018DETAILS: The RISC-V Workshop in Chennai will showcase the expansive RISC-V ecosystem, highlighting current and prospective projects and implementations that influence the future evolution…

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RISC-V Foundation at Design Automation Conference (DAC) Proceedings

RISC-V Foundation at Design Automation Conference (DAC) Proceedings June 24 – 27, 2018The 54th Design Automation Conference (DAC) was held at the Moscone Center West, in San Francisco from June 25 – 25, 2018. DAC 2018 demonstrated the exciting momentum of the RISC-V ecosystem. The RISC-V Foundation booth featured member companies Imperas Software, Microsemi, SiFive, Syntacore, UltraSoC and Western Digital. Throughout the event, the RISC-V Foundation hosted panels and speaking …

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RISC-V Day in Shanghai Proceedings

RISC-V Day in Shanghai June 30, 2018  The RISC-V Day in Shanghai, China took place on June 30, 2018. Hosted by Fudan University in Shanghai, the event included in-depth technical presentations and updates on the RISC-V architecture, a speaking lineup from leading technology companies and research institutions in the RISC-V ecosystem and networking opportunities. ProceedingsCheck out the slides from each of the sessions below. Time Event Speaker, Affiliation Slides 8:00 am…

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