Welcoming RISC-V International Board Members

RISC-V International Welcomes New Board Members: Leading Growth Through Technology, Opportunity, and CommunityBy Calista Redmond, August 3, 2020The RISC-V community has grown and matured rapidly in the 10 years since RISC-V inception, and in our 5 year history as an organization. We’ve progressed together through technology, opportunity, and community. RISC-V has become a disruptive technology, spurred unprecedented semiconductor innovation, and demonstrated there is a simpler and modular way of building…

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RISC-V Global Forum: Technology. Opportunity. Community.

The schedule for RISC-V Global Forum is live! We have an exciting lineup of keynotes, session presentations, lightning talks, ask the experts, sponsor exhibits, and networking opportunities. Below you can find all the exciting information about how to interact in our Global Forum digital experience. Connected worldwideThis event is fully virtual, bringing together a worldwide audience with 18 hours of content that includes three keynote blocks, concurrent sessions, and exhibit opportunities….

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RISC-V International & Members at the 57th Annual Design Automation Conference!

  Members of RISC-V International will be delivering numerous presentations and hosting discussions and tutorials at the annual Design Automation Conference (DAC) 2020, taking place from Monday, July 20 through Friday, July 24, showcasing RISC-V’s incredible momentum since its inception ten years ago at the University of California, Berkeley.The presentations, discussions and tutorials will focus on new and exciting developments and implementations from the RISC-V community, spotlighting how the instruction set…

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Unleash Memory and Storage to Enable Next Generation Architectures

Today’s data center architectures are struggling to keep up with the explosive bandwidth and data growth requirements. In many applications, such as machine learning, sequential data bases and computational storage, we commonly run into practical limitations dictated by the maximum available size of main memory and the scale of storage capacity. Main memory is currently under control of the central processing unit (CPU), while storage is constrained by legacy implementations…

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seL4 is verified on RISC-V!

by Gernot Heiser, CSIRO/Data61Sounds great! But what does it mean? seL4seL4 (pronounced ess-e-ell-four) is arguably the world’s most secure operating system (OS) kernel. The OS kernel is the lowest level of software running on a computer system. It is the code that executes in privileged mode (S-mode in RISC-V; M-mode is reserved for microcode/firmware).  The kernel is ultimately responsible for the security of a computer system. seL4 is a microkernel. The idea…

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seL4 operating system protects critical systems on RISC-V architecture from cyber-attacks

Organisations around the world are developing processors based on the open RISC-V instruction-set architecture (ISA), targeting diverse platforms ranging from embedded and cyberphysical systems to high-end servers. Many will be built into safety- and security-critical systems. Now, these systems can be protected from cyber attacks by the world’s most secure operating system.CSIRO’s Data61, the data and digital specialist arm of Australia’s national science agency, today announced the completion of the…

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Strengthening the Internet of Things with a Secure RISC-V IoT Stack

By Sandro Pinto, Head of Research and Development at Hex Five Security Inc.The Internet of Things, also known as the IoT, refers to the billions of physical devices around the world that are now connected to the internet, all collecting and sharing vast amounts of data. Due to the sheer amount of connected devices, the IoT has become an integral part of the lives of billions of people around the…

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Welcome Mark Himelstein, RISC-V International CTO!

Today RISC-V is honored to welcome Mark Himelstein to our leadership team as the RISC-V Chief Technology Officer. Mark brings an incredible set of experiences in leading technology innovations in both software and hardware to the microprocessor and systems industry. His collaboration across teams, companies, individuals, customers, and diverse stakeholders has shaped his approach and acumen to take on challenges and opportunities with mutual success in mind. RISC-V has gained…

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Q&A with RISC-V Ambassador Wei Fu on the Growth and Future of RISC-V

The inaugural group of RISC-V Ambassadors was announced in March 2020, consisting of an incredible group of engineers, developers and influencers that have actively contributed to the RISC-V community. The RISC-V Ambassadors are passionate about growing and engaging the RISC-V community by: promoting RISC-V projects and technology; educating people on the RISC-V mission and technical aspects; and helping to drive RISC-V member participation and community growth. To learn more about…

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Happy 10th Birthday RISC-V!

It is hard to believe, but the RISC-V project is ten years old today! RISC-V at HotChips, Flint Center, Cupertino CA, August 2014After careful perusal of old email files, we’ve decided that May 18th, 2010, was the day when we finally decided to develop our own clean-slate ISA, and so we’re using this as the official birthday of RISC-V, even though the actual name came a bit later.Back then, we…

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