RISC-V Foundation Seeks Technology Leader

The RISC-V Foundation is looking for a technology leader who can foster a successful technical ecosystem with deep member and community engagement and meaningful progress across technical imperatives in growing adoption of the RISC-V architecture. The technology leader will facilitate the technical vision, cultivate stakeholder engagement, and drive the strategy in collaboration with RISC-V members. This person will be the Foundation’s technical leader in facilitating progress across our workgroups and…

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Final Countdown to RISC-V Summit in San Jose

The RISC-V Summit in San Jose starts on Monday, December 9. There is still time to register for both the Summit itself and the all-members working day on December 9, but the window is closing soon. This Summit will bring together the principal movers and shakers in the hardware industry. This is not an event to miss.For more information and details on the event, please see the agenda page. If…

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RISC-V Summit Member Day Schedule UPDATED

This is the schedule for Member Day on December 9, ongoing. Registration is required, as is RISC-V member status – see the Join page for details.UPDATE: Our apologies, the zoom links this morning were not working well. These are new dialup links for the meetings. I will keep this up to date in case anything changes, so be sure to check back prior to any particular meeting. 1pmISA Formal Model …

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Semico Forecasts Strong Growth for RISC-V

Semico forecasts strong growth for RISC-V, predicting the market will consume 62.4 billion RISC-V CPU cores by 2025San Francisco – Nov. 25, 2019 – The RISC-V Foundation, a non-profit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), today announced that Semico Research’s new report “RISC-V Market Analysis: The New Kid on the Block” estimates that the market…

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The RISC-V Foundation Announces the “Student of the Year” and “Educator of the Year” Awards

RISC-V has deep roots in academia. What started out as a summer project in 2010 at UC Berkeley has turned into one of the most exciting innovations in the silicon industry over the last decade. Since its inception, the RISC-V Foundation has been a strong advocate for educational communities and individuals using the Instruction Set Architecture (ISA) to pursue independent projects. Of course, with more than 325 members in the…

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Getting Started with RISC-V Europe Roadshow Proceedings

Europe Roadshow Proceedings September, 2019In collaboration with the Linux Foundation, the RISC-V Foundation hosted a series of free, Getting Started with RISC-V events in Tel Aviv, Munich, Berlin, Tallinn, Paris, and London. These events showcased innovative RISC-V implementations from members of the Foundation.The roadshow featured talks from AdaCore, Andes Technology, GreenWaves Technologies, Imperas, Microchip Technology, Minres, OneSpin, SiFive, Syntacore, Thales, Trinamic and Western Digital.Check out the agenda and slides to…

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The RISC-V Foundation Announces Agenda for the Second Annual RISC-V Summit

The three-day conference will feature keynotes, exhibitions, smaller breakout sessions, tutorials and networking receptionsWHAT: The RISC-V Foundation has announced the agenda for the RISC-V Summit 2019WHERE: San Jose Convention Center in San Jose, Calif.WHEN: Monday, Dec. 9 to Thursday, Dec. 12, 2019DETAILS: The RISC-V Foundation, in partnership with Informa’s Tech Division of Informa PLC, is hosting its annual RISC-V Summit, a four-day conference featuring keynotes, smaller breakout sessions, tutorials, exhibitions…

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第一届中国 RISC-V 论坛 – “征稿通知”

一、论坛介绍(Introduction):随着以RISC-V为主体的开源芯片生态的不断完善,IoT、AI、自动驾驶、移动终端等领域的芯片创新热情正在持续升温,国内外基于RISC-V的芯片如雨后春笋般迅速涌现,引发了从指令集到系统软件的整个芯片产业的巨大变革。围绕RISC-V搭建自由多元的交流平台,分享RISC-V的研发经验,探讨RISC-V的前沿技术动态和发展趋势,既是开放开源的精神所在,亦是互惠共赢的大势所趋。RISC-V国际基金会中国委员会、RISC-V国际开源实验室(RIOS)和中国开放指令生态(RISC-V)联盟,将携手举办首届“第一届中国RISC-V论坛”(The First China RISC-V Forum)。论坛将紧密围绕基于RISC-V的芯片生态的关键技术问题,邀请国内外相关领域学术界和产业界的专家学者,分享RISC-V处理器设计、开发工具、IP核与SoC以及系统软件等领域的前沿研发成果,共同推动开源芯片设计理念在全世界的繁荣发展,驱动下一个计算架构发展的黄金时代。网站:https://crvf2019.github.io  【论坛已开放注册】时间:2019年11月12日-13日地点:广东省深圳市南山区清华大学深圳国际研究生院主办单位:RISC-V国际开源实验室(RIOS)RISC-V基金会中国委员会中国开放指令生态(RISC-V)联盟(CRVA)承办单位:清华-伯克利深圳学院(TBSI)二、大会组织委员会(Organizing Committee):论坛主席(General Chair):谭章熹清华-伯克利深圳学院  兼职教授RIOS实验室    副主任指导委员会主席(Steering Committee Chair):方之熙RISC-V基金会中国委员会   主席前英特尔公司  副总裁首任英特尔中国研究院  院长致象尔微      创始人兼首席科学家程序委员会主席(Program Committee Chair):包云岗中国开放指令生态(RISC-V)联盟  秘书长中国科学院计算技术研究所    研究员鹏城实验室开源芯片院士工作室  执行负责人本地主席(Local Chair):陈伟坚清华-伯克利深圳学院   副院长 三、程序委员会(Program Committee): 苏泓萌,晶心科技 陈渝,清华大学 戴伟民,芯原微电子 戴东来,致象尔微电子 胡振波,芯来科技 孟建熠,阿里平头哥 宋威,中国科学院信息工程研究所 唐丹,中国科学院计算技术研究所 武延军,中国科学院软件研究所 Cissy Yuan,睿思芯科  四、论坛议题(Topics):论坛聚焦科研成果和技术经验分享,面向国内外在RISC-V及其软硬件生态上取得阶段性技术突破的专家学者们,公开征集报告。 RISC-V处理器核设计,覆盖乱序高性能核、低功耗等多种设计。 基于FPGA 和IC 的RISC-V芯片设计 编译器,工具链(调试器、跟踪器、加载器等)和RISC-V系统软件支持 开源EDA设计流程(如RTL仿真器,综合,DFT,布局布线等) 领域专用体系结构设计(如AI、IoT、自动驾驶等) 基于RISC-V的安全体系结构设计 基于RISC-V的IP和SoC设计 RISC-V的系统软件及应用软件接口规范等 RISC-V在教学领域的实践  四、投稿要求(Submission Guideline):本届论坛以短文(short paper)的方式征集报告,程序委员会将根据短文的质量,经讨论后决定是否录用。投稿要求如下: 中英文投稿皆可,但页数需不超过两页(不含参考文献和附录)。 短文模板可自由选择,但需提交 pdf 文档(推荐使用 ACM template)。 所提交稿件可以是未发表(或已发表)的论文、技术报告等 审稿方式为公开同行审稿(Open Peer Review),并非双盲(Double-blind),请在稿件中注明作者、单位和邮箱等信息。 论坛重点关注RISC-V的技术突破,商业宣传类文章将不被录用。   重要日期 投稿截止时间: 2019年 10月 20日 录取通知时间: 2019年 10月…

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The First RISC-V China Forum – Call for Papers

The First China RISC-V ForumNovember 12-13Lecture Hall, 3F, CII Building, Tsinghua Shenzhen International Graduate School, University Town, Nanshan District, Shenzhen·ChinaRISC-V is growing up very fast in China these years, and the open source silicon development ecosystem is getting more and more improved. It shows up at the emerging areas such as IoT, AI, Self-driving, edge computing and makes a lot of innovation and changes from computer architecture ISA to system…

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Security in the Age of RISC-V: Bay Area Meetup Oct 1

Rambus will host a security session related to RISC-V on October 1, 2019.Agenda 6:00-6:45 Networking Reception 6:45-7:00 Microchip – Rich Newell or Ted Speers (Secure RISC-V SoC FPGA) 7:00-7:15 Draper 7:15-7:30 QuickLogic 7:30-7:45 Rambus – Helena Handschuh (RISC-V & Security Overview) 7:45-8:00 Riscure 8:00-8:15 Foundries.io 8:15 Q & AFor more information, see the meetup page. Hope to see you there!

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