The capitalist computing bourgeoisie want to enslave us all with proprietary processing architectures, but the proletariat eventually produces its own processor alternative – an ISA for and by the people,…
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A longtime supporter of the RISC-V (pronounced RISC Five) instruction set architecture (ISA), Microsemi provides tools and RISC-V soft cores for its various FPGA lines, including the recently unveiled Mi-V (pronounce My Five) ecosystem. Mi-V…
On Oct. 14, 2017, researchers in fields related to computer architecture, compilers, and systems gathered for the First Workshop on Computer Architecture Research with RISC-V (CARRV) for a technical exchange…
Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced the company’s new Mi-V™ ecosystem with industry leaders, to increase adoption of its…
With its new, first-of-its-kind Linux-compatible multi-core CPU, SiFive is moving to pushing the open source RISC-V architecture into an expanded world of use cases, including machine learning and IoT. SiFive…
The Global Semiconductor Alliance has released a new report “Charting a New Course for Semiconductors” which explores the future of the semiconductor industry and asks “Is RISC-V the new Linux?”….
Visiting Researcher Saleh Elmohamed submitted an EE Times blog post reporting on the 2nd RISC-V workshop.
A video of a RISC-V talk given today by Krste Asanovic, followed by a question and answer session, is now available online.
The Swedish electronic design magazine Elektronik Tidningen has published an article about RISC-V with contributions from Krste Asanovic, David Patterson, and Yunsup Lee (in Swedish).
Andreas Olofsson is the founder of Adapteva and the creator of the Epiphany architecture and Parallella open-source computing project. He has published his own analysis of the RISC-V ISA. Quoting…