Andes Technology Takes The Lead In Launching RISC-V Total Solutions And Driving Industry-Academia Collaboration With Over 120 Projects

Hsinchu, Taiwan – January 09, 2020 – Andes Technology (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores, has cooperated with more than 70 universities worldwide to date, after signing the first contract of industry-academia cooperation with National Chiao Tung University (NCTU) in 2010. Andes continues to provide CPU IP AndesCore™ licensing, software development tool AndeSight™, and hardware development platforms to schools with licensing series from AndeStar V3 architecture to…

Read More...

How To Get Started With RISC-V-Based Microcontrollers | Jacob Beningo, DigiKey

Designers are under constant pressure to innovate yet keep their intellectual property (IP) secret, while also lowering power consumption and cost. This made the RISC-V open-source hardware instruction set architecture (ISA) interesting for designers of processors for mobile applications. Now that RISC-V is an option for microcontrollers, designers of embedded systems and consumer devices need a quick on-ramp to start their own RISC-V designs.article: https://www.digikey.com/en/articles/techzone/2020/jan/how-to-get-started-with-risc-v-based-microcontrollers

Read More...

Build Your Own Edge AI SoC With SiFive RISC-V CPUs And CEVA AI Chips | Eric Brown, LinuxGizmos

SiFive and CEVA announced that CEVA-BX audio DSPs, CEVA-XM vision chips, and up to 12.5-TOPS NeuPro AI processors will be added to SiFive’s DesignShare program, enabling customers to create custom “Edge AI SoCs” built around SiFive’s RISC-V CPUs.article: http://linuxgizmos.com/build-your-own-edge-ai-soc-with-sifive-risc-v-cpus-and-ceva-neural-coprocessors/

Read More...

Are Open Source RISC-V CPUs Destined For The Server Market? | Christine Hall, IT Pro

One thing that was evident at the December 2019 RISC-V Summit in San Jose, Calif., is that the RISC-V open source instruction set architecture, meant for designing and manufacturing silicon chips, is a rising star in the hardware world. The big question right now is whether the project will forever remain in the CPU-helper space it currently occupies, or will we be seeing RISC-V CPUs being deployed in data center…

Read More...

RISC-V Business: SiFive And CEVA Join Forces To Enable The Development AI-Amenable, Edge-Oriented Processors | Thomas Claburn, The Register

On Tuesday, RISC-V CPU fixer SiFive announced it’s working with CEVA, which licenses technology for deep learning, audio, and computer vision, to simplify the creation of processors capable of handling machine learning code without demanding too much power.article: https://www.theregister.co.uk/2020/01/08/riscv_sifive_ceva/

Read More...

SiFive And CEVA Partner To Bring Machine Learning Processors To Mainstream Markets

SAN MATEO and MOUNTAIN VIEW, Calif., Jan. 7, 2020 /PRNewswire/ — SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions and CEVA, Inc. (NASDAQ: CEVA), the leading licensor of wireless connectivity and smart sensing technologies, today announced a new partnership to enable the design and creation of ultra-low-power domain-specific Edge AI processors for a range of high-volume end markets. The partnership, as part of SiFive’s DesignShare program, is centered around RISC-V CPUs,…

Read More...