Hank Yung Article: Semiconductor Design Is Also Open-Source

Open source is also emerging in the semiconductor design market. RISC-V is an open-source system that can be freely used and modified by publicly disclosing design assets. It is a core technology of semiconductors, is attracting attention as it expands its scope. Semiconductor start-up, SiFive, which is leading the risk five system, recently separated the Korean branch into SemiFive, making a brand new corporation. To read more, please visit https://www.hankyung.com/it/article/2019071432861. Please note the original…

Read More...

El Androide Libre Article: The First Processors Based On RISC-V Increasingly Closer: What Is RISC-V?

RISC-V has become increasing more popular in the technology industry. We expect to hear more about the Foundation and the ISA, since it has even started to be used in some wearables.RISC-V is an open source alternative to AMD or Intel processors based on the x86 / x86-64 architecture, in addition to the variants of the ARM-based microphones. The developers of RISC-V have been introducing improvements to convince manufacturers, especially in…

Read More...

EE Times Article: AI At The Very, Very Edge

When the TinyML group recently convened its inaugural meeting, members had to tackle a number of fundamental questions, starting with: What is TinyML?TinyML is a community of engineers focused on how best to implement machine learning (ML) in ultra-low power systems. The first of their monthly meetings was dedicated to defining the issue. Is machine learning achievable for low power devices such as microcontrollers? And are specialist ultra-low-power machine learning…

Read More...

Semiinsights Article: The Application Of RISC-V Is Heating Up In China.

Chinese modules are being used in many products, including Japan and other overseas countries. The most representative is being used for the well-known Espressif’s Wi-Fi Communication Modules. In addition, Chinese manufacturers have launched numerous cost-effective products, such as LTE modules, Wi-Fi modules and Bluetooth modules widely used in various fields. We recognized that the key feature to lead the tendency is RISC-V has been applying in increasingly more China’s local…

Read More...

Huaqiang Electronics Article: Ratification Of The RISC-V Base ISA And Privileged Architecture Specifications

RISC-V foundation announced the ratification of the RISC-V base ISA and privileged architecture specifications, which marks a milestone for the growing RISC-V ecosystem on July 10, 2019. With Huawei was added to US Entity List by the Commerce Department, the open-source ISA, RISC-V is getting more attention in China. Doubt is unavoidable since RISC-V technology was derived from the University of California-Berkeley. Many insiders thought the ISA is open-source, which…

Read More...

Leiphone Article: How Does China Find Out The Breakthrough In The Field Of Open-Source? RISC-V Will Be A Golden Opportunity

The sixth BenchCouncil 2019 was held in Shenzhen from June 27 to 29, which invited Jesse Zhixi Fang, Chair of the RISC-V Foundation China Advisory Committee, along with Dai Weimin, China RISC-V Industry Consortium and many experts and scholars to discuss the current status and future development of the open-source chips, as well as talk about how China can find out a breakthrough in the area. To read more, please visit https://www.leiphone.com/news/201907/433EKvYvGbbnpTEY.html. Please…

Read More...

Semiconductor Engineering Article: Week In Review: Design, Low Power

This week Semiconductor Engineering made a round-up of notable news in the open-source world including RISC-V base ISA and privileged architecture specifications have been ratified by the RISC-V Foundation. Additionally, the RISC-V privileged architecture covers all aspects of RISC-V systems beyond the unprivileged ISA, including privileged instructions as well as additional functionality required for running operating systems and attaching external devices. Each privilege level has a core set of privileged ISA extensions with…

Read More...

CNbeta Article: RISC-V Foundation Approves RISC-V Basic Instruction Set Architecture And Privilege Architecture Specification

The RISC-V Foundation announced the approval of the RISC-V basic instruction set architecture and privileged architecture specification, which introduces scalability for RISC-V. The Open Source Instruction Set RISC-V, is freely available for any purpose compared to other instruction sets, allowing anyone to design, manufacture and sell RISC-V chips and software. To read more, please visit https://www.cnbeta.com/articles/tech/866395.htm. Please note that the original article is in Chinese.

Read More...

CNX Software Article: Linux 5.2 Release – Main Changes, Arm, MIPS & RISC-V Architectures

Linux 5.1 delivered higher performance asynchronous I/O thanks to io_uring interface, made a further change to deal with the year 2038, added TEO governor for improved performance without additional power consumption, and added an option for adjusting Zstandard compression level for BTRFS file system among many other changes. The Arch/RISC-V support for SiFive’s L2 cache controller has been merged, which should unblock the EDAC framework work and adds support for…

Read More...

Bit-Tech Article: RISC-V Foundation Ratifies ISA Specifications

SiFive Chief Executive Naveed Sherwani is predicting commercial RISC-V smartphones within two years and servers in five, but was held back due to the lack of ratifying the RISC-V architecture. The Foundation has now solved this with the formal ratification of the specification. It locks in both the base ISA standard as well as the privileged architecture specification, which is designed to provide protection between different levels of the software stack and…

Read More...