RISC-V Ecosystem News

Picocom Embeds 32 Andes N25F RISC-V Cores Into Its 5G NR Small Cell Baseband SoC

HSINCHU, TAIWAN –August 4, 2020– Picocom has selected the AndesCore™ N25F RISC-V 32-bit core integrated with the AE350 peripherals platform for its forthcoming 5G small cell distributed unit (DU) System-on-Chip (SoC). Picocom is a 5G open RAN baseband semiconductor company with vast experience in the field of small cells. Its chosen partner, Andes Technology, is a leading supplier of high-performance, low-power compact 32/64-bit RISC-V CPU cores and the Founding Premier member…

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Tachyum Shows Prodigy Running Existing x86, ARM, And RISC-V Software

SANTA CLARA, Calif., August 4, 2020 – Tachyum™ Inc. today announced that its Prodigy Universal Processor has successfully completed software emulation testing across x86, ARM and RISC-V binary environments. This important milestone demonstrates that Prodigy will enable customers to run their legacy applications transparently at launch with better performance than any contemporary or future ARM or RISC-V processors. Coupled with hyperscale data center workhorse programs such as Hadoop, Apache and…

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Dev Kit Weekly: RISC-V GD32V Evaluation Board From IAR Systems And GigaDevice | Perry Cohen, Embedded Computing Design

At this point you’ve heard of RISC-V and how fast the technology and ecosystem are expanding. But, given that the open-source ISA is still relatively new, there aren’t a ton of development kits out there that focus on RISC-V.In comes the GD32V, a 32-bit general-purpose microcontroller that is based on the RISC-V core. It incorporates a 32-bit RISC-V processor core, which operates at a 108 MHz frequency with 128 Kilobytes…

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PolarFire SoC Icicle Kit with Antmicro’s HDMI board

The PolarFire SoC from our partner Microchip is the first mass-market Linux-capable implementation of RISC-V and the early access release of the Icicle development kit is huge news in the RISC-V world. Although this exciting 4+1 core FPGA SoC is becoming physically available only now, we have been collaborating with Microchip (then Microsemi) around this FPGA SoC since as early as 2017, enabling support for it in our Renode simulation platform. It is all the more…

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Aldec @ DAC 2020: Presenting RISC-V Verification Methodologies and Solutions

Henderson, NV – July 15, 2020  – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and SoC designs, is presenting RISC-V Verification Methodologies and Solutions at the 2020 Virtual Design Automation Conference (DAC) on July 20-24, 2020.Article: https://www.aldec.com/en/company/news/2020-07-15/444

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