Skip to main content
Ecosystem News

Aldec and Codasip at Embedded World: Showcasing an Integrated UVM Simulation Environment for Verifying Custom Instructions with RISC-V Cores | Business Wire

By February 24, 2020No Comments

BUSINESS WIRE)–Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, is exhibiting at Embedded World in Nuremberg, Germany on February 25-27, 2020. Aldec and Codasip will be showcasing an integrated UVM simulation environment for verifying custom instructions with RISC-V cores. article: https://www.businesswire.com/news/home/20200219005186/en]]>