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Andes Announces the N25F-SE Processor, the World First RISC-V CPU IP with ISO 26262 Full Compliance | Yahoo! Finance

Systematic failures and random hardware failures can be mitigated by development process and safety designs of the safety-enhanced N25F-SE

HSINCHU, TAIWAN, Oct. 17, 2022 (GLOBE NEWSWIRE) — Andes Technology, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announces its safety-enhanced AndesCore® N25F-SE is the first RISC-V CPU IP certified to be fully compliant with ISO 26262 functional safety standards for the development of automotive applications. SGS-TÜV Saar GmbH, an independent functional safety certification body, has assessed and completed product audit process for N25F-SE with achieved functional safety for ASIL B (Automotive Safety Integrity Level B) applications, according to all applicable ISO 26262 series of standards including Parts 2, 4, 5, 8 and 9.

Read the full announcement.