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Ashling announce RiscFree™ C/C++ SDK support for the newly launched Synopsys ARC-V RISC-V ISA based Processors

November-7, 2023, RISC-V Summit, Santa Clara, Silicon Valley, California, USA

Ashling today announced support for the Synopsys ARC-V RISC-V ISA compliant Processor family.

Ashling, as a long-term Synopsys partner for over fifteen years and a provider of Debug and Trace probe solutions for Synopsys ARC® Processor users, is excited about the launch of the new Synopsys ARC-V™ Processor IP based on the RISC-V ISA. The news that Synopsys, as one of the world’s leading providers of Processor IP, is adopting the RISC-V ISA reiterates the sheer momentum behind RISC-V and it’s mounting influence in our industry.

As one of the leading members of the RISC-V tools ecosystem, we’re very excited to continue working closely with Synopsys, ensuring that our RiscFree™ SDK, synonymous with RISC-V, supports the new Synopsys ARC-V Processor family.” – Hugh O’Keeffe, CEO of Ashling.

Read the full release.