BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//RISC-V International - ECPv6.17.5//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-ORIGINAL-URL:https://riscv.org
X-WR-CALDESC:Events for RISC-V International
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:Europe/London
BEGIN:DAYLIGHT
TZOFFSETFROM:+0000
TZOFFSETTO:+0100
TZNAME:BST
DTSTART:20250330T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0100
TZOFFSETTO:+0000
TZNAME:GMT
DTSTART:20251026T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0000
TZOFFSETTO:+0100
TZNAME:BST
DTSTART:20260329T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0100
TZOFFSETTO:+0000
TZNAME:GMT
DTSTART:20261025T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0000
TZOFFSETTO:+0100
TZNAME:BST
DTSTART:20270328T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0100
TZOFFSETTO:+0000
TZNAME:GMT
DTSTART:20271031T010000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:Europe/Prague
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20250330T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20251026T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20260329T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20261025T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20270328T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20271031T010000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20250309T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20251102T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20260308T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20261101T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20270314T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20271107T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:Asia/Singapore
BEGIN:STANDARD
TZOFFSETFROM:+0800
TZOFFSETTO:+0800
TZNAME:+08
DTSTART:20250101T000000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:Asia/Shanghai
BEGIN:STANDARD
TZOFFSETFROM:+0800
TZOFFSETTO:+0800
TZNAME:CST
DTSTART:20250101T000000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:Europe/Berlin
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20250330T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20251026T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20260329T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20261025T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20270328T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20271031T010000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:Europe/Dublin
BEGIN:STANDARD
TZOFFSETFROM:+0000
TZOFFSETTO:+0100
TZNAME:IST
DTSTART:20260329T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0000
TZNAME:GMT
DTSTART:20261025T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0000
TZOFFSETTO:+0100
TZNAME:IST
DTSTART:20270328T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0000
TZNAME:GMT
DTSTART:20271031T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0000
TZOFFSETTO:+0100
TZNAME:IST
DTSTART:20280326T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0000
TZNAME:GMT
DTSTART:20281029T010000
END:DAYLIGHT
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260929
DTEND;VALUE=DATE:20261001
DTSTAMP:20260928T193041Z
CREATED:20260928T193005Z
LAST-MODIFIED:20260928T193041Z
UID:10002420-1790640000-1790812799@riscv.org
SUMMARY:RISC-V at Microelectronics UK
DESCRIPTION:Come see us\, SiFive and MIPS by GF at the RISC-V hub located in the front of Microelectronics UK! \nSept 29 – 30 in Excel London \nDay 1 @ 12:45pm – RISC-V\, SiFive & MIPS by GF will be on a Panel – “RISC-V and the Future of Open Architectures“ \nComputing is evolving rapidly\, with new requirements for AI\, safety\, security\, power efficiency and connectivity to meet the demands of future applications. To achieve your design goals\, customization is key. RISC-V is the open standard Instruction Set Architecture (ISA) that a whole ecosystem of companies is basing their products on\, from chips\, to silicon IP\, to EDA tools\, and software solutions. They are using the inherent customizability and extendibility of the RISC-V standard to deliver differentiated products that tackle specific market needs in a targeted way that has not been possible until now. \nCome to this session to hear how RISC-V addresses markets across the compute spectrum\, from IoT to Automotive to Industrial and beyond\, and how computing based on the RISC-V open standard can enable you to deliver a more optimized\, innovative product roadmap to market faster than ever before.
URL:https://riscv.org/event/risc-v-at-microelectronics-uk/
LOCATION:Excel London\, Royal Victoria Dock\, 1 Western Gateway\, London\, United Kingdom
ATTACH;FMTTYPE=image/png:https://riscv.org/wp-content/uploads/2026/09/Microelectronics-UK-logo.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20261007
DTEND;VALUE=DATE:20261010
DTSTAMP:20260414T154107Z
CREATED:20260414T154107Z
LAST-MODIFIED:20260414T154107Z
UID:10002309-1791331200-1791590399@riscv.org
SUMMARY:Open Source Summit - Europe
DESCRIPTION:RISC-V will be at Open Source Summit Europe! \nOctober 7 – 9 in Prague\, Czechia \nMore information coming soon. \n 
URL:https://riscv.org/event/open-source-summit-europe/
LOCATION:Prague Congress Centre\, 5. kvetna 1640/65\, Nusle\, 140 21 Prague 4\, Prague\, Czech Republic
CATEGORIES:Industry Events
ATTACH;FMTTYPE=image/png:https://riscv.org/wp-content/uploads/2026/04/OSS_EU.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20261007T100000
DTEND;TZID=America/Los_Angeles:20261007T140000
DTSTAMP:20260928T185342Z
CREATED:20260928T185342Z
LAST-MODIFIED:20260928T185342Z
UID:10002403-1791367200-1791381600@riscv.org
SUMMARY:Maximize RISC-V Performance with Custom Design
DESCRIPTION:Join Andes Technology on October 7 for an in-person technical workshop at SEMI Headquarters in Milpitas\, CA. Explore practical ways to improve RISC-V processor performance through custom instructions\, strategies for addressing the memory wall\, and DGEMM optimization with RISC-V Vector processing. Connect with the Andes team and fellow engineers over lunch. \nOctober 7\, 2026 | 10:00 AM–2:00 PM | SEMI Headquarters\, Milpitas\, CA
URL:https://riscv.org/event/maximize-risc-v-performance-with-custom-design/
LOCATION:SEMI Headquarters\, 673 South Milpitas Blvd.\, Milpitas\, CA\, 95035\, United States
CATEGORIES:Industry Events
ATTACH;FMTTYPE=image/jpeg:https://riscv.org/wp-content/uploads/2026/09/Andes_1007_inperson_Maximize-RISC-V-Performance-with-Custom-Design.jpg
ORGANIZER;CN="Andes Technology Corp.":MAILTO:america@andestech.com
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Singapore:20261015T090000
DTEND;TZID=Asia/Singapore:20261016T180000
DTSTAMP:20260928T185253Z
CREATED:20260928T185253Z
LAST-MODIFIED:20260928T185253Z
UID:10002324-1792054800-1792173600@riscv.org
SUMMARY:Whit More
DESCRIPTION:Vartus Group is pleased to invite you to attend AIBDA 2026\, the 2nd International Conference on Artificial Intelligence and Big Data Analytics\, taking place on October 15-16\, 2026 in Singapore City\, Singapore. Organized as a hybrid event\, the conference will gather AI researchers\, data scientists\, technology leaders\, and academic experts to delve into transformative advancements in artificial intelligence\, machine learning\, and big data technologies. This two-day event will offer insightful keynote speeches\, expert panel discussions\, and interactive networking opportunities—serving as a premier platform for innovation and collaboration in AI and data analytics.
URL:https://riscv.org/event/whit-more/
LOCATION:singapore\, Singapore City\,\, Singapore\, Singapore\, 049213\, Singapore
CATEGORIES:Member Hosted Webinar
ATTACH;FMTTYPE=image/png:https://riscv.org/wp-content/uploads/2026/05/AI-banner-2026-scaled.png
ORGANIZER;CN="Vartus Group Limited":MAILTO:aibda@vartusconference.com
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20261018
DTEND;VALUE=DATE:20261021
DTSTAMP:20260707T070338Z
CREATED:20260707T070338Z
LAST-MODIFIED:20260707T070338Z
UID:10002360-1792281600-1792540799@riscv.org
SUMMARY:RISC-V China Summit
DESCRIPTION:The 6th RISC-V China Summit is coming October 18 – 20 in Shenzen Convention & Convention Center. \nCall for Papers  *  Sponsorship Prospectus   *   Registration  *   will be available soon
URL:https://riscv.org/event/risc-v-china-summit/
LOCATION:Shenzen Convention & Exhibition Center
CATEGORIES:RISC-V Events
ATTACH;FMTTYPE=image/jpeg:https://riscv.org/wp-content/uploads/2026/07/Key-Visual-scaled.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20261118
DTEND;VALUE=DATE:20261120
DTSTAMP:20260707T072247Z
CREATED:20260707T072155Z
LAST-MODIFIED:20260707T072247Z
UID:10002361-1794960000-1795132799@riscv.org
SUMMARY:ACC - Automotive Computing Conference
DESCRIPTION:The Gateway to Interactive Learning & Global Networking Driving Innovation in Automotive High-Performance Computing – Where unmatched expertise fuels inspiration and thought-provoking content sparks new possibilities\, RISC-V will be present to engage with these industry leaders. \nNovember 18 – 19\, 2026 in Munich Germany
URL:https://riscv.org/event/acc-automotive-computing-conference/
LOCATION:NH Hotel Munich East Conference Center
CATEGORIES:Industry Events
ATTACH;FMTTYPE=image/png:https://riscv.org/wp-content/uploads/2026/07/WordPress-Event-Logo2.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20270118
DTEND;VALUE=DATE:20270119
DTSTAMP:20260817T171516Z
CREATED:20260817T171516Z
LAST-MODIFIED:20260817T171516Z
UID:10002380-1800230400-1800316799@riscv.org
SUMMARY:PARMA-DITAM 2027 Workshop
DESCRIPTION:18th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures\n16th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms\nGlasgow\, Scotland\, 18/01/2027\nCo-located with HiPEAC\nCall for Papers & More Information
URL:https://riscv.org/event/parma-ditam-2027-workshop/
CATEGORIES:Community Events
ATTACH;FMTTYPE=image/png:https://riscv.org/wp-content/uploads/2026/08/PARMA_DITAM_27_Banner.png
END:VEVENT
END:VCALENDAR