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Junior CPU Design Verification Engineer

Junior CPU Design Verification Engineer

Website SiFive

We bring RISC-V, software, and silicon experts together to innovate with a modern, software-driven approach to semiconductors.

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

Responsibilities:

  • Triage and debug tests with senior verification engineers to deliver functionally correct design blocks.
  • Plan and debug the verification infrastructure to keep the regressions and the tools in perfect status to identify fault points.
  • Identify and write all types of coverage measures for stimulus and corner-cases.

Requirements:

  • Bachelor’s, or Master’s degree in Computer Science, Electrical Engineering, or a similar discipline.
  • Familiarity or academic experience with hardware design and verification.
  • Experience with basic CPU microarchitecture (and related technologies and algorithms), as well as functional verification and simulation tools.
  • Recent graduates are welcome

To apply for this job please visit www.sifive.com.

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