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Performance Architecture – Workload Characterization, Analysis & Tuning

Performance Architecture – Workload Characterization, Analysis & Tuning

Website SiFive

We bring RISC-V, software, and silicon experts together to innovate with a modern, software-driven approach to semiconductors.

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

This Performance Architect will be responsible for the workload characterization of applications running on RISC-V cores. They will need to have understand of computer architecture, micro-architecture as well as System software, benchmark software and profiling and monitoring tools. Hands-on Lab skills is a plus. Knowledge of competitive system such as ARM and APPLE will round out the candidate.


  • Using performance architecture skills, the successful candidate will perform competitive HW/SW analysis and optimize workloads to obtain high performance for the SiFive RISC-V microarchitecture, and build tools & flows to efficiently automate these activities.


  • CPU Performance benchmarking using silicon, RTL simulators or performance models
  • Workload performance analysis in the areas of optimal source code, efficient compilation and bottleneck analysis
  • Desirable: Workload characterization and workload reduction techniques for performance simulation
  • Desirable: FPGA or ASIC synthesis, place and route, develop strategies and constraints to enable near complete utilization of available FPGA resources.
  • Desirable: FPGA debug, including use of Integrated Logic Analyzer for waveform capture and debug


  • Ability to build Linux, root file systems and modify boot code ( cross and native compile experience)
  • Deploying bare metal workloads on silicon boards for the purpose of performance measurement and board tuning
  • Knowledge of SPEC, SPECrate, EEMBC, MLPerf, other standard benchmarks, and/or vector benchmarks
  • Desired: SimPoint analysis, workload characterization, and workload reduction through BBV and statistical analysis
  • Desired: Python and TCL scripting for workflow automation


  • Familiar with git or other source code control system
  • Strong background with Linux-based development environments including python/shell programming

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