RISC-V Vector Coprocessor for ECG Detection on UET-RVMCU (RISC-V Mentorship)

  • Internship
  • Remote

Mentor: Shehzeen Malik

Company: University of Engineering & Technology, Lahore, Pakistan

This project aims to develop and verify a custom RISC-V Vector (RVV) v1.0 compliant coprocessor to accelerate an Electrocardiogram (ECG) detection algorithm. Building on our previous work with a CGRA accelerator, this project addresses its key limitations by leveraging the standardized RISC-V Vector extension, which offers superior toolchain support and predictable data-level parallelism.

The mentee will focus on two core pillars:

  1. Verification and Integration of RVV Modules: Rigorously test and integrate pre-designed hardware modules to build a functional vector coprocessor.
  2. Algorithm Development: Implement and optimize vectorized ECG signal processing kernels using RVV intrinsics.

Why This Project?

Our previous LFX project using the OpenEdgeCGRA revealed critical issues: poor documentation, a custom compiler, and inefficient spatial-parallelism leading to excessive NOPs. By adopting the RISC-V Vector standard, we solve these problems. The mentee will gain hands-on experience with industry-standard verification methodologies and hardware-accelerated algorithm design, contributing directly to an open-source biomedical computing platform.

Project Goals:

  • Verify and integrate the components of a lightweight RVV coprocessor (VLEN=128, 4 lanes).
  • Develop comprehensive testbenches and a verification plan for the vector processor.
  • Design and optimize vectorized ECG detection algorithms using RVV intrinsics.
  • Benchmark the performance of the vectorized algorithms against scalar implementations.
  • Create detailed documentation, including a verification report.

Repository URL: https://github.com/meds-ee-uet/UET-RVMCU

Learning Objectives:

Technical Skills:

  • Gain a deep, practical understanding of the RISC-V Vector Extension v1.0 through hands-on verification and programming.
  • Master modern digital design verification methodologies, including testbench creation, and debugging of complex hardware modules.
  • Understand the full stack of hardware acceleration by developing performance-critical software that targets a custom co-processor.
  • Learn biomedical signal processing fundamentals through the implementation of a real-world ECG detection pipeline.

Professional Development:

  • Learn industry-standard open-source collaboration tools and workflows (Git, GitHub).
  • Practice creating professional-grade technical documentation, including verification reports and algorithm specifications.
  • Build a strong portfolio with tangible contributions to a significant open-source hardware/software project.
  • Receive structured mentorship with weekly syncs and code reviews, preparing for professional engineering roles.

Mentorship Structure:

  • Weekly 1-hour technical meetings for progress review and strategic guidance.
  • Daily asynchronous support via Slack/email for immediate problem-solving.
  • Bi-weekly deep-dive code and verification plan reviews.

Coding Challenge: https://drive.google.com/file/d/1KkfX5T3XT47w9ORSXTra0-uge1sIm3ce/view?usp=sharing

To apply for this job please visit mentorship.lfx.linuxfoundation.org.