RISC-V Foundation Board of Directors

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Krste Asanovic – Chairman of the Board

Krste Asanović is a professor in the EECS Department at the University of California, Berkeley (UC Berkeley). He received a PhD in Computer Science from UC Berkeley in 1998 then joined the faculty at MIT, receiving tenure in 2005, before returning to join the faculty at UC Berkeley in 2007. His main research areas are computer architecture, VLSI design, parallel programming and operating system design. He is currently director of the UC Berkeley ASPIRE lab tackling the challenge of improving computational efficiency now that transistor scaling is ending. He leads the free RISC-­V ISA project at UC Berkeley, serves as chairman of the RISC­-V Foundation, and co­founded SiFive Inc. to support commercial use of RISC­-V processors. He received the NSF CAREER award, and is an ACM Distinguished Scientist and an IEEE Fellow.

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Zvonimir Bandic

Zvonimir Z. Bandić is a research staff member and senior director of Next Generation Platform Technologies at Western Digital Corporation in San Jose, Calif. He received his Bachelor of Science in electrical engineering in 1994 from the University of Belgrade, Yugoslavia, and his Master of Science (1995) and PhD (1999) in applied physics from Caltech, Pasadena, in the field of novel electronic devices based on wide bandgap semiconductors. He is currently focusing on both NAND and emerging Non-Volatile Memories (PCM, ReRAM, MRAM) applications for data center storage and computing, including CPU, memory, networking and storage. He has been awarded over 50 patents in the fields of solid state electronics, solid state disk controller technology, security architecture and storage systems and has published over 50 peer-reviewed papers.

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Charlie Hauck

Charlie is CEO of Bluespec, Inc., a provider of high­-level tools and IP for ASIC and FPGA design. Before Bluespec, he was general manager of Faraday Technology USA, a fabless ASIC company. Charlie has over 25 years of experience in marketing and developing RISC processors at Lexra, LSI Logic, Kendall Square Research and Commodore. Charlie received a Bachelor of Science from Johns Hopkins University and a Master of Science from the Massachusetts Institute of Technology.

Rob Oshana

Rob manages a global software development team in the connectivity and security business of NXP; he also leads the RISC-V efforts for the company. Rob is an internationally recognized speaker and book author in embedded systems and is part of the executive committee for the Design Automation Conference. He is also an adjunct professor at multiple universities and an IEEE Senior Member.

 

Dave Patterson

David Patterson – Vice Chair

David Patterson is likely best-known for the book Computer Architecture: A Quantitative Approach written with John Hennessy for Berkeley research projects Reduced Instruction Set Computers (RISC), Redundant Arrays of Inexpensive Disks (RAID), and Network of Workstations. He also served as UC Berkeley’s Computer Science Division chair, the Computing Research Association chair, and president of the Association for Computing Machinery. Additionally, David was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He received the Berkeley Citation in 2016, which is given to distinguished individuals who go beyond the call of duty and whose achievements exceed the standards of excellence in their fields.

Frans Sijstermans

Frans Sijstermans

Frans Sijstermans is a vice president of engineering at NVIDIA. He is responsible for the architecture and implementation of multi media hardware components, including camera interface, video codecs, image processing and computer vision accelerators, and display controllers. Besides multimedia, his interests include processor architectures, deep learning, and security. He holds a Master of Science degree from Eindhoven University of Technology in the Netherlands.

Ted Speers

Ted Speers

Ted Speers is head of product architecture and planning for Microsemi’s SoC Group, where he is responsible for defining its roadmap for low power, secure, reliable FPGAs and SoC FPGAs. He joined Microsemi in 1987 and held roles in process engineering and product engineering before assuming his current role in 2003. He is a Technical Fellow and co-inventor on 35 U.S. patents. Prior to joining Microsemi, he worked at LSI Logic. Ted has a Bachelor of Science in chemical engineering from Cornell.

 

RISC-V Foundation Executives

Rick O'Connor

Rick O’Connor – Executive Director

Rick O’Connor is executive director of the RISC-V Foundation and RapidIO.org. With many years of executive level management experience in semiconductor and systems companies, Rick possesses a unique combination of business and technical skills and was responsible for the development of dozens of products accounting for over $500 million in revenues. Rick holds an executive MBA degree from the University of Ottawa and is an honors graduate of the faculty of Electronics Engineering Technology at Algonquin College.

Sue Leininger

Sue Leininger – Community Manager

Sue Leininger is community manager of the RISC-V Foundation and RapidIO.org. She is an experienced marcom executive with a HUB-certified consulting business. Sue is a published and award-winning writer as well as an editor for various forms of technical communication. Her writings appear on various online business sites, blogs and e-zines. She has taught classes in advertising, media and marketing at the university level and served as a faculty member at Concordia University teaching technical/business writing. Sue received a Bachelor of Arts in communications from Brigham Young University and a Master of Arts in technical communication from Texas State University.