Welcome to the RISC-V Foundation Members Directory. To use this Directory, scroll through the Member Profiles below, click on a specific profile or logo to see detailed information on each member or use the Advanced Search to search by more fields.
UltraSoC has semiconductor IP for debug (run control, trace, etc) for complex SoCs: making it easy to develop, optimize, fix bugs, reduce power consumption and reduce cost.
This can be used pre‐silicon, to accelerate emulation and prototyping, or post‐silicon to support bring up, HW/SW integration or even in‐field/in‐use.
UltraSoC has full support for RISC‐V (and other CPUs e.g. heterogeneous multi‐core), but debug addresses not just the CPU but across whole SoC.