RISC-V Ecosystem News

Libre RISC-V Hybrid CPU/GPU Looking For Cash | Nick Farrell, Fudzilla

The open source Libre RISC-V hybrid CPU/GPU project is applying for eight additional grants from the NLNet Foundation. For those not in the know, the NLNet Foundation is a non-profit outfit supporting privacy, security, and the “open internet”.Details on each Grant Application are on the newly-opened RISC-V Community Forum.article: https://fudzilla.com/news/graphics/49491-libre-risc-v-hybrid-cpu-gpu-looking-for-cash

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SiFive Announces New DesignShare IP Partnerships | SiFive

SAN MATEO, Calif., Sept. 30, 2019 /PRNewswire/ — SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, announced today new partners for SiFive’s uniquely collaborative DesignShare IP ecosystem program, enabling the AI and embedded vision market. With rising costs on advanced process technology nodes, modern SoC design must include essential IP focused on the target market, designed in an efficient way. The SiFive DesignShare IP program offers a streamlined…

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360 Registered Attendees for RISC-V Day Tokyo 2019 | RISC-V Association

The RISC-V Day Tokyo 2019, held by the RISC-V Association on 9/30, attracted 360 registered attendees. The event was held at at the Baba Memorial Hall at Kokubunji Hitachi Central Laboratory. The number of attendees made this a largest RISC-V event in Japan up to today. Presentation materials will be uploaded on web: http://riscv-association.jp/riscv-day-tokyo-2019/. 15 companies and RISC-V Foundation made presentations and 11 companies conducted demonstrations.article: http://riscv-association.jp/en/2019/10/360-attended-riscvtokyo-plan-to-doublesize-in-2020/

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Announcing the Winners of the RISC-V Soft CPU Contest

As the number of connected devices skyrockets, the attack surface also increases. To solve the growing challenge of mitigating cybersecurity threats, every component in a system must be evaluated for its vulnerabilities. Processors today are able to run billions of instructions per second – this means you can access a world of content at your fingertips, but there’s also a risk of exploitation. Every processor requires built-in security features to…

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Andes and Dover Microsystems Partner to Deliver Professional Network Security Solution for RISC-V | Andes Technology

HSINCHU, TAIWAN , Sept. 25, 2019 – Andes Technology Corporation (TWSE: 6533), a founding member of the RISC-V Foundation and the leading supplier of 32/64-bit embedded CPU cores with solutions serving in excess of 1-billion diversified SoCs yearly, and Dover Microsystems, the first company to immunize processors against entire classes of network-based attacks, announced a strategic partnership to deliver professional network security solution for RISC-V. Dover’s CoreGuard® technology is the only…

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Kumico RISC-V Meetup in Japan Oct 23 & 25

さまざまな企業から注目されている「エッジコンピューティング」。 現在、自動車、医療、産業、家電など幅広い分野での導入が進んでいます。しかしながらその技術の進歩は加速度的に進んでおり、ソフトウェアだけでなくハードウェアのレベルでも柔軟に対応できる設計が求められています。 『KUMICO Meetup 2019』では、お客様のエッジコンピューティングを実現に導く、技術・製品・ノウハウをご紹介します。“Edge computing” is attracting attention from various companies. Currently, it is being introduced in a wide range of fields including automobiles, medical care, industry, and home appliances. However, advances in technology are accelerating, and there is a need for designs that can flexibly handle not only software but also hardware levels. “KUMICO Meetup 2019” introduces technologies, products, and know-how that will help customers achieve edge computing.秋葉原…

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Open ISAs Gaining Traction | Semiconductor Engineering

Open instruction set architectures are starting to gain a foothold, often in combination with other processors, as chipmakers begin to add more specialized compute elements and more flexibility into their designs.There are a number of these open ISAs available today, including Power, MIPS, and RISC-V, and there are a number of permutations and tools available for sale based on those architectures. What has opened the door to making these more…

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The Growing Impact Of Portable Stimulus | Semiconductor Engineering

It has been a year since Accellera’s Portable Test and Stimulus Specification became a standard. Semiconductor Engineering sat down to discuss the impact it has had, and the future direction of it, with Dave Kelf, chief marketing officer for Breker Verification Systems; Larry Melling, product management director for Cadence; Tom Fitzpatrick, strategic verification architect for Mentor, a Siemens Business; and Tom Anderson, technical marketing consultant for OneSpin Solutions. What follows are excerpts of…

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