RISC-V Workshop in Chennai July 18-19, 2018 The RISC-V Workshop in Chennai, India took place July 18-19, 2018. Hosted by The Indian Institute of Technology Madras (IIT Madras) and sponsored by Western Digital, the RISC-V Workshop in Chennai discussed current and prospective RISC-V projects and implementations to influence the future evolution of the instruction set architecture (ISA) from Silicon Valley to Silicon Fenn and beyond.The event featured in-depth technical presentations…
Read More...RISC-V Foundation Announces Agenda For RISC-V Workshop In Chennai
Date:July 10, 2018
Workshop features more than 20 speaking sessions and a keynote from Western Digital WHAT: RISC-V Workshop in Chennai, IndiaWHERE: IC&SR Building, Indian Institute of Technology (IIT) Madras, Sardar Patel Road, Opposite to C, L.R.I, Adyar, Chennai, Tamil Nadu 600036, IndiaWHEN: Wednesday, July 18 and Thursday, July 19, 2018DETAILS: The RISC-V Workshop in Chennai will showcase the expansive RISC-V ecosystem, highlighting current and prospective projects and implementations that influence the future evolution…
Read More...RISC-V Day in Shanghai Proceedings
Date:July 5, 2018
RISC-V Day in Shanghai June 30, 2018 The RISC-V Day in Shanghai, China took place on June 30, 2018. Hosted by Fudan University in Shanghai, the event included in-depth technical presentations and updates on the RISC-V architecture, a speaking lineup from leading technology companies and research institutions in the RISC-V ecosystem and networking opportunities. ProceedingsCheck out the slides from each of the sessions below. Time Event Speaker, Affiliation Slides 8:00 am…
Read More...RISC-V Workshop in Chennai
Date:June 20, 2018
RISC-V Workshop in Chennai July 18-19, 2018 The RISC-V Foundation invites you to attend the RISC-V Workshop in Chennai, India on July 18-19, 2018. Hosted by The Indian Institute of Technology Madras (IIT Madras) and sponsored by Western Digital, the RISC-V Workshop in Chennai will discuss current and prospective RISC-V projects and implementations, as well as influence the future evolution of the instruction set architecture (ISA) from Silicon Valley to…
Read More...RISC-V Summit – Call for Papers
Date:June 13, 2018
Call for Papers RISC-V Summit December 3-6, 2018 Lead Sponsor: We’re seeking proposals for speaking sessions that explore recent developments in the RISC-V community at the inaugural RISC-V Summit, held at the Santa Clara Convention Center in Santa Clara, Calif. from Dec. 3-6, 2018.The speaking faculty and program are selected based on the topic and content submitted and the speaker’s qualifications by the program committee and the RISC-V research and editorial…
Read More...RISC-V Workshop in Chennai – Call for Papers
Date:May 23, 2018
Call for Papers RISC-V Workshop in Chennai July 18-19, 2018 Hosted By: We’re seeking proposals for talks and poster presentations conveying recent activity in the RISC-V community at the upcoming RISC-V Workshop hosted by The Indian Institute of Technology Madras in Chennai, India from July 18-19, 2018.Talks can be of two lengths (25 minutes and 12 minutes), and talk presenters are expected to also participate in the evening reception to…
Read More...RISC-V Workshop in Barcelona Recap
Date:May 16, 2018
Click HERE to Join the RISC-V Foundation Mail Lists Workshop RecapThanks to everyone who attended the RISC-V Workshop in Barcelona! With 325 attendees, this was our biggest event outside of Silicon Valley, demonstrating the momentum of the RISC-V Foundation and the growth of the ecosystem in Europe.We were excited to see the news unveiled by member companies announcing new solutions and partnerships, and a strong commitment to the RISC-V ISA….
Read More...RISC-V Workshop in Barcelona Proceedings
Date:May 8, 2018
RISC-V Workshop in Barcelona Proceedings 7-10 May, 2018 Co-hosted By Co-sponsored By Keynote sessions at the event included Robert Oshana, vice president of software engineering research and development at NXP, Martin Fink, executive vice president and chief technology officer at Western Digital, and Mateo Valero, director at the Barcelona Supercomputing Center. Monday, May 7, 2018 – A half-day of tutorials from the working groups of the RISC-V technical committee. The sessions covered…
Read More...RISC-V Foundation And Informa Announce First Annual RISC-V Summit In Silicon Valley And 2018 Workshop Schedule
Date:April 23, 2018
To Support the Ecosystem’s Ongoing Growth and Increased Global Footprint, RISC-V Foundation Partners with KNect365 to Help Facilitate Events in 2018 and Beyond Berkeley, Calif. – April 23, 2018 – The RISC-V Foundation, a non-profit corporation controlled by its members to drive forward the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), today announced, in partnership with Informa’s Knowledge & Networking Division, KNect365, the RISC-V Foundation’s…
Read More...RISC-V Workshop in Barcelona
Date:April 19, 2018
RISC-V Workshop in Barcelona 7-10 May, 2018 Co-hosted By Co-sponsored By The RISC-V Foundation invites you to attend the RISC-V Workshop in Barcelona, Spain on 7-10 May, 2018. Co-hosted by the Barcelona Supercomputing Center (BSC) and Universitat Politècnica de Catalunya (UPC), and co-sponsored by NXP and Western Digital, the RISC-V Workshop in Barcelona will gather the RISC-V ecosystem to share notable RISC-V updates, projects and implementations.Keynote sessions will include Robert Oshana,…
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