Events
RISC-V Summit North America 2025 On-Demand
Missed the action? Presentations are available to view on the RISC-V International YouTube Channel!
Embecosm used the oneAPI Construction Kit to explore accelerating PyTorch using RISC-V cores, trying over a thousand in emulation and some on an FPGA. This case study shows how the oneAPI Construction Kit lets you…
7 Things I Learned at RISC-V Summit North America 2025As the dust settles on RISC-V Summit North America 2025, Tom Gall looks back at what he learned at his first RISC-V Summit since joining as VP of Technology.
Andes: d-Matrix and Andes Team on World’s Highest Performing, Most Efficient Accelerator for AI Inference at ScaleAndes: d-Matrix and Andes have partnered to integrate Andes’ high-performance AX46MPV RISC-V CPU IP into d-Matrix’s next-generation Raptor accelerator, the first to feature 3D In-Memory Compute (3DIMC) technology for faster, more efficient AI inference at…
The RISC-V instruction set architecture (ISA) offers a highly customizable open standard platform, enabling developers to build, port, and optimize software applications, extensions, and hardware. Its simplicity and modularity enables efficient design and optimization, fostering innovation and reducing development time and cost.
Becoming a member of RISC-V International allows companies to actively influence the development of an open, royalty-free instruction set architecture, driving innovation in custom processor designs. Membership also provides access to a global community of experts and resources, fostering collaboration and accelerating product development.
RISC-V Fundamentals + Foundational Associate Exam Bundle
Designed for computer engineers and programmers to gain skills in RISC-V processors, enhancing your job market competitiveness. Essential learning experience for anyone looking to enhance their career in the tech industry.