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Recap of the Fall 2021 CHIPS Alliance Workshop | Rob Mains, CHIPS Alliance

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We recently held our fall 2021 CHIPS Alliance workshop with nearly 160 attendees present for informative seminars covering a range of topics including porting Android to RISC-V, open source ASIC…

RISC-V: The Open era of computing

RISC-V: The Free and Open RISC Instruction Set Architecture

RISC-V is the free and open ISA
… Driven through Open collaboration
… Enabling freedom of design across all domains and industries
… Cementing the strategic foundation of semiconductors

Welcome to the Open era of computing!

RISC-V International is a non-profit organization supporting the free and open RISC instruction set architecture and extensions. We enable open community collaboration, technology advancements in the RISC-V ecosystem, and visibility of RISC-V successes.

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RISC-V Blog

Recap of the Fall 2021 CHIPS Alliance Workshop | Rob Mains, CHIPS Alliance

| Blog, What's New | No Comments
We recently held our fall 2021 CHIPS Alliance workshop with nearly 160 attendees present for informative seminars covering a range of topics including porting Android to RISC-V, open source ASIC…

De-RISC – The H2020 Project Which Will Create The First RISC-V Fully European Platform For Aerospace, Celebrates Its Second Anniversary | Ana Rísquez Navarro, De-RISC

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The De-RISC Project celebrates its second year through the introduction of a market-ready hardware-software platform based on the RISC-V instruction set architecture (ISA), productizing a multi-core RISC-V system-on-chip and an…

In the News

SME: Scalable Masking Extensions | Ben Marshall (PQShield Ltd and University of Bristol) and Dan Page (University of Bristol)

| In the News | No Comments
Supporting masking countermeasures for non-invasive side-channel security in instructions set architectures is a hard problem. Masked operations often have a large number of inputs and outputs, and enabling portable higher…

Sneak peek into SiFive’s most powerful RISC-V yet | Steve Bush, Electronics Weekly

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So far only called ‘Next Generation Core’ or Next-Gen, its official name, final design specs and availability will be unveiled early in December at the RISC-V Summit. The headline figure…

Announcements

RISC-V Launches the Open Hardware Diversity Alliance

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Founded in Collaboration with the CHIPS Alliance, OpenPOWER Foundation, and Western Digital, the Alliance is Focused on Providing Support Programs, Learning Opportunities, and Mentoring for Women and Underrepresented Individuals in…

The 2021 RISC-V Summit Will Demonstrate Adoptions and Technical Advances This December in San Francisco

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ZURICH and SAN FRANCISCO – July 28, 2021 – RISC-V International announced the 2021 RISC-V Summit that will bring together the open hardware community for three days of deep technical…

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RISC-V International comprises a large member organization building the first open, collaborative community of software and hardware innovators powering innovation at the edge forward. Through various events and workshops, RISC-V International is changing the way the industry works together and collaborates – creating a new kind of open hardware and software ecosystem. Become a member today and help pioneer the industry’s future de facto ISA for design innovation.

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