SpacemiT, a RISC-V AI CPU company based in China, has announced significant advancements in its development of the SpacemiT Vital Stone® V100 server CPU chip, which now offers a comprehensive hardware and software platform that…
What you’ll learn: How MIPS supports functional safety with RISC-V. What functionality is provided by MIPS RISC-V P8700 core? Why designers are looking to vendors like MIPS for solutions rather…
uried in the inner workings of your laptop is a secret blueprint, dictating the set of instructions the computer can execute and serving as the interface between hardware and software. The…
RISC stands for reduced instruction set computer, and V points to its fifth release in 2015. RISC-V is the new processor architecture to watch out for. Arm-based processors, which stayed among…
Dive into the fascinating world of RISC-V processors as we explore their architecture, benefits, and revolutionary impact on computing! In this video, we break down the fundamentals of RISC-V technology,…
US RISC-V AI chip designer Inspire Semiconductor Holdings is to de-list from the TSXV Venture Exchange in Toronto today, following a move to go private. Inspire, based in Austin, Texas,…
For over 50 years, the semiconductor industry has relied on the Tomasulo algorithm, introduced by IBM in 1967, to build specialized CPUs, GPUs, and other chips tailored to specific computing tasks. Now,…
SiFive HiFive Premier P550 RISC-V development board review and demos. You can learn more about the board on its web page here: https://www.sifive.com/boards/hifive-... Note that the HiFive Premiere P550 shown…
The march of the RISC-V architecture continued through 2024, with neuromorphic computing from Innatera in the Netherlands and a universal processor that combines the functions of the CPU, GPU, and…
Abstract The European Processor Initiative (EPI) is a project dedicated to developing a general-purpose processor and an accelerator, alongside the necessary software layers for their integration into the High Performance…
The Acer N30 is a PDA released in 2004 that shipped with a 240 x 320 pixel resistive touchscreen display, a 266 MHz Samsung S3C2410 processor, and Windows Mobile 2003 software. It’s…
"Life, liberty, and the pursuit of happiness" is more than a phrase but a promise that has shaped the American conscience through triumphs and trials alike. Now, in a world…
The rise of RISC-V has been rapid but adoption within safety and security critical spaces requires implementations that can meet requirements like ISO 26262 and ASIL-B/D. In this video, Sameer…
In this episode of Product of the Week, Robin Mitchell introduces the ESP32 C6 Dev Kit, a powerful single-board microcontroller platform featuring the latest ESP32 C6 SoC. This DevKit boasts…
December 4th, 2024 – Silicon Valley, CA – Tenstorrent and Ashling announce a major advancement in SoC development, targeting software bring up and removing debug bottlenecks to accelerate development cycles.…
Frontgrade Gaisler in Sweden has signed a deal with the European Space Agency (ESA) to build a 7nm rad hard chip for space systems using the RISC-V architecture. The EEE…
🚀 Discover how RISC-V is transforming technology across devices. With its open-source, customizable architecture, RISC-V boosts efficiency and enhances performance. 📱💻For smartphones, it delivers faster performance and longer battery life,…
Yocto is the de facto standard for running Linux on embedded systems, and this is of course true for RISC-V as well. We are happy to share a Yocto build…
Jmem Tek has also joined the AndeSentry security collaborative framework, which offers a range of security solutions for Andes RISC-V processors, designed to counter threats from both cyber-attacks and physical…
Blueshift Memory has introduced a new RISC-V processor reference design intended to tackle twin computing challenges: the Memory Wall, caused by slower memory access compared to processors, and the Energy…
BOS Semiconductors in Korea has developed the industry’s first RISC-V AI accelerator chiplet using IP from US startup Tenstorrent. The Eagle-N chiplet was jointly developed by the two companies with the Tenstorrent…
A leading IP company for high performance, AI-enabled, RISC-V processors, Semidynamics has announced that it has been selected by UPMEM as its core provider for its next generation of LPDDR5X…
Artificial intelligence is increasingly transforming industries, and adopting RISC-V as a flexible and scalable architecture plays a significant role in this shift. Ian Ferguson, senior director at SiFive, shared insights…
TWAIN's expanded charter to drive innovation of embedded technologies for IoT devices including 10 billion RISC-V cores that have been shipped into the market RALEIGH, N.C., Dec. 4, 2024 /PRNewswire-PRWeb/ -- The…
Going back to April 2024, SiFive announced the HiFive Premier P550 as an interesting RISC-V developer board to succeed their HiFive Unleashed that was a nice little RISC-V board. There were delays in shipping the…
A leading IP company for high performance, AI-enabled, RISC-V processors, Semidynamics has announced that it has been selected by UPMEM as its core provider for its next generation of LPDDR5X…
Artificial intelligence is increasingly transforming industries, and adopting RISC-V as a flexible and scalable architecture plays a significant role in this shift. Ian Ferguson, senior director at SiFive, shared insights…
Learn about the trends behind accelerating automotive compute in software-defined vehicles, autonomous driving, ADAS, and AI. Drew Barbier, Vice President of Product at MIPS, sits down with Vasanth Waran, a…
Semiconductor veterans secure $3.7M seed funding to launch a universal RISC-V processor that eliminates the need for specialized chips, enabling advanced AI at no additional cost in embedded systems by…
You may have heard of RISC-V -- usually pronounced 'risk-five' -- it's an instruction set architecture originally designed to support computer architecture research and education but which has evolved to…
Could you give us an overview of RISC-V's mission and why it's expanding so rapidly, with over 4,500 members across 70+ countries? RISC-V's rapid growth aligns with the increasing demand…
RISC-V is an open Instruction Set Architecture (ISA), where the ISA can be thought of as the contract between the software and hardware worlds. Since RISC-V was first released around a decade…
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, a leading developer of RISC-V chips and software for high-performance computing (HPC) and artificial intelligence (AI), today announced that they are cooperating with NEC Corporation…
Barcelona / Tokyo, 14 of November 2024 –Openchip, NEC and the Barcelona Supercomputing Center are studying collaboration to develop the new Openchip Vector Computing Accelerator for use in supercomputing data…
DeepComputing is excited to announce the launch of an exclusive early access program for the DC-ROMA RISC-V Mainboard, specifically designed for industry and business customers. This limited-edition initiative gives early…
Andes and Synopsys present a ‘software first’ design flow using virtual platforms/prototypes allows RISC-V developers to explore new hardware configuration options with application SW workloads and full OS support. Watch…
MIPS released its P8700 CPU based on the RISC-V computing architecture to target driver assistance and autonomous vehicle applications. The San Jose, California-based company, which focuses on developing efficient and configurable…
Formal For All! “Do I need a PhD to use formal verification?” “Can formal methods really scale?” “Is it too difficult to write formal properties that actually prove something?” “If…
What you’ll learn: The state of RISC-V, including new RISC-V announcements. A look at some good video presentations at the 2024 RISC-V Summit. RISC-V trends in 2025. I didn't make…
San Jose, CA — Oct. 22, 2024 — Andes Technology, a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, are proud to announce…
RISC-V is an industry standard instruction set architecture (ISA) born in UC Berkeley. RISC-V is the fifth iteration in the lineage of historic RISC processors. The core value of the…
Last week’s RISC-V Summit in Santa Clara, Calif., had an air of confidence that we have not seen at previous summits. There was much for this tight-knit community to shout…
In this roundup, we discuss several announcements from last week's summit pushing RISC-V adoption and processing power. Four companies, including Andes Technology, RISC-V International, Arteris, and Codasip, made significant announcements…
San Jose, CA — Oct 22, 2024 — DeepComputing, a pioneer in RISC-V innovation, today announced a strategic partnership with Andes Technology Corporation, a leading provider of high-efficiency, low-power 32/64-bit RISC-V processor cores. Together,…
It looks like the upcoming Linux 6.13 cycle will be adding RISC-V support for user-space pointer masking and tagged address ABI. RISC-V pointer masking can be used for implementing memory tagging akin…
Leading Japanese automotive supplier Denso is expanding its semiconductor business through a development license agreement for a Neural Processing Unit (NPU) AI core from Quadric in the US, adding its…
RISC-V firm Milk-V demonstrated that it can get AMD’s RX 7900 XTX graphics card to work on one of its RISC-V boards. The PC shown in the video uses Milk-V’s Megrez board,…
MUNICH, Germany, Oct 28, 2024 – Codasip has announced its new L730 core. Codasip L730 is a high-quality, high-performance embedded core that meets automotive safety and security needs enabling ISO/SAE 21434 and…
By: David Patterson I started my career at Hughes Aircraft in 1972 while working on my Ph.D. at the University of California, Los Angeles (UCLA). After designing airborne computers for…
Although Nvidia's GPUs rely on proprietary CUDA cores that feature their instruction set architecture and support for various data formats, these cores are controlled by custom cores that rely on…
In brief: Nvidia has been quietly using the RISC-V architecture to power numerous computing devices, and deploying a substantial number of cores to paying customers. In fact, the company is nearing…
The ratification of the RVA23 profile for RISC-V marks a monumental moment for the architecture, and anyone who's been following RISC-V knows that this isn't just a checkbox. RVA23 is…
RVA23 Profile, a major release for the RISC-V software ecosystem, has been ratified, and it’s expected to help accelerate widespread implementation among toolchains and operating systems. Before ratification, it underwent…
October 22, 2024 – Santa Clara, CA – Ashling and Embecosm are excited to announce their latest collaboration in delivering a comprehensive, optimized toolchain for Akeana’s range of high-performance RISC-V…
The world’s highest performance RISC-V development board unlocks new opportunities for software developers to create the next era of RISC-V applications Santa Clara, Calif. – Oct. 21, 2024 – SiFive,…
SEGGER has expanded the capabilities of its debugger and performance analyzer, Ozone by adding semihosting support for debugging RISC-V applications. This feature now enables RISC-V developers to use I/O to perform debugging…
Hello everyone! A month and a half ago, we wrote about the latest status of the RISC-V DynaRec (Dynamic Recompiler, which is the JIT backend of Box64) and shared the gratifying progress…
The open-source revolution is expanding beyond software into hardware design. New microcontrollers from Microchip Technology and Espressif incorporate processors based on RISC-V—an open-source instruction set architecture challenging Arm’s dominance in connected devices. RISC-V,…
It’s an exciting time to be involved in open source. Linux powers the world’s most critical devices, a story to which Red Hat has always been a champion. Today we…
LDRA has extended support for the RISC-V instruction set architecture (ISA) in its high assurance quality analysis and verification tool suite. The LDRA static analysis tools support emerging RISC-V implementations such as…
Nick Flaherty talks to Calista Redmond, CEO of RISC-V International, on how the European Chips Act is driving the open instruction set architecture forward. “The recent European summit showed the…
Lauterbach has extended their industry leading TRACE32® debug and trace tools to include support for Synopsys’ RISC-V instruction set based ARC-V™ processor IP, which includes full debug and trace, including…
Real time applications such as space or automotive where instant autonomous decision making is crucial require configurable standardized interrupt controllers. There are many well-known examples such as the Global Interrupt…
Those looking for PC management solutions like KVMs, particularly in the server space, may be interested to hear of Sipeed's new KVM expansion card, which just opened up for preorders…
The RISC-V Summit, North America will take place October 22-23, 2024 at the Santa Clara Convention Center in Santa Clara, California. According to RISC-V International, the organization supporting and defining the standards…
Speaker: Yungang Bao. Deputy Director, Institute of Computing Technology, Chinese Academy of Sciences. Chief Scientist, Beijing Institute of Open Source Chip. It is widely recognized that the open-source hardware ecosystem…
CORE-V-VERIF is an open-source project supported by the OpenHW Group. Its goal is to provide an open-source environment and work-flow that can be deployed onto any RISC-V processor core. Since…
By Wenbo Yin, Vice President of IC Design, TetraMem Inc. Introduction The rapid proliferation of artificial intelligence (AI) across a growing number of hardware applications has driven an unprecedented demand…
NX45 Becomes the Only RISC-V Core to Pass Rivos’ Rigorous Verification Process After Extensive Evaluation of Leading RISC-V Cores San Jose, CA – Sep. 11, 2024 — Rivos Inc., a RISC-V Premier…
By: Dr. Charlie Su, President and CTO, Andes Technology Corp. At Andes Technology, we are excited to share some of our latest advancements and insights into the growing role of RISC-V…
Today’s shorter product time to market makes silicon verification runway shorter. Tenstorrent is working on CPUs based on RISC-V architecture for many AI applications. Since this is an emerging processor…
Processors using the open standard RISC-V instruction set architecture (ISA) are becoming more and more common, with an estimated 30% of SoCs designed in 2023 containing at least one RISC-V…
Patrick Little, SiFive Chairman, President and CEO talks about how RISC-V is shaping the future of compute, how SiFive is gaining momentum from applications from embedded to the datacenter and…
RISC-V is the fast growing, open standard instruction set architecture (ISA) for processors of all types including CPUs and accelerators. These processors can be utilized for a wide variety of…
RISC-V inventor and SiFive Founder Krste Asanovic discusses why RISC-V is "built for" AI applications and how SiFive is working from the edge to the datacenter to bring AI solutions…
SiFive, a designer of chips based on the RISC-V computing platform, announced a series of new AI chips for high-performance AI workloads. The SiFive Intelligence XM Series is designed for…
The development of AI computing has reached a critical inflexion point. Large-language models (LLMs) have attracted tremendous attention recently and require huge computations for AI model training and inference. In…
VyperCore in Bristol is aiming to design and sell a 5nm chip and card for the server market to accelerate existing software. For this, VyperCore is ramping up recruitment of…
YouTuber bitluni's latest incredible build video uses a RISC-V microcontroller with an uncommon driving technique to create a modular magnetic LED matrix. The LED matrix is an off-the-shelf 8x8 module. Bitluni…
The rise of Artificial Intelligence (AI) and Machine Learning (ML) has rapidly impacted today's global economy, influencing everything from healthcare to autonomous systems. As of 2023, 55% of organizations used…
Santa Clara, Calif. – Sept. 18, 2024 – Today, SiFive, Inc. the gold standard for RISC-V computing, announced the SiFive Intelligence™ XM Series designed for accelerating high performance AI workloads. This is…
With RISC-V processor architectures gaining traction across diverse computing systems, ensuring their reliability through rigorous verification becomes more crucial than ever. We have embraced a robust co-simulation strategy for verifying…
Lauterbach's TRACE32® development tools now provide support for Renesas’s primary 32-bit RISC-V® general-purpose Microcontroller family, designed for cost-conscious and energy-efficient embedded applications. In addition to providing read and write access…
On this episode of Embedded Insiders, we’re joined by Calista Redmond, CEO of RISC-V International, and Andrea Gallo, VP of Technology, as they dive into the organization’s latest technical breakthroughs,…
By: Olof Kindgren "A new SERV version! How much smaller than the last one?" Hate to disappoint you all, but we have now reached the point where the award-winning SERV, the…
Calista Redmond, CEO of RISC-V International, joins Sanjay Gangal of EDACafe to discuss the growth of RISC-V, the community, and the upcoming RISC-V Summit North America taking place on Oct…
The rise of Artificial Intelligence (AI) and Machine Learning (ML) has rapidly impacted today's global economy, influencing everything from healthcare to autonomous systems. As of 2023, 55% of organizations used…
RISC-V is a powerful instruction set that is constantly evolving. One of the recent evolutions relates to code size reduction. Last year, the RISC-V Zc extensions were ratified. The team at Codasip…
Bulgarian open hardware specialist Olimex is gearing up to launch a RISC-V single-board computer that will cost around one dollar at retail — and while it's basic, it's enough to…
The rapid proliferation of artificial intelligence (AI) across a growing number of hardware applications has driven an unprecedented demand for specialized compute acceleration not met by conventional von Neumann architectures.…
Barcelona, Spain – September 9, 2024. Semidynamics, the European RISC-V custom core AI specialist, is on a major recruitment drive for a wide range of engineers from junior to senior at its Barcelona…
In this episode of Wine Down Friday, we are thrilled to welcome Calista Redmond, CEO of RISC-V International. Calista shares her journey from IBM to leading the charge at RISC-V,…
RISC-V, the open-standard ISA, has inspired a host of innovative designs in tablets, cameras, and laptops. In the past few years, RISC-V has transitioned from a project relegated to academia…
Joining the likes of PINE64, Geniatech, and Milk-V, Orange Pi announces a Raspberry Pi-like SBC built atop the StarFive JH7110. Single-board computer specialist Orange Pi has launched a new Raspberry…
The emergence of Artificial Intelligence (AI) and Machine Learning (ML) is one of the most significant computing trends in recent history. According to research, by 2027, spending on AI software…
Santa Clara, Calif. - September 2, 2024 — Today SiFive, Inc. announced that it has licensed its SiFive Automotive RISC-V IP cores to Arkmicro Technologies (Shenzhen), accelerating the adoption of RISC-V in automotive…
Developer Jesse Taube has become the first to successfully boot a minimal Linux distribution on the Raspberry Pi Pico 2's RP2350 microcontroller — taking advantage of the chip's new open…
The market is experiencing a major shift to the RISC-V ISA and MIPS is helping to fuel this transition with high performance RISC-V cores, including debug, trace and performance tools…
Andes Technology in Taiwan has confirmed details of its deal with Italian software provider Resiltech for Software Test Libraries (STL) for automotive-grade RISC-V processor IP. The partnership, signed in December,…
Pontedera, Italy and Hsinchu, Taiwan – Aug 29th, 2024 – Resiltech, a renowned provider of comprehensive security and safety solutions and services, and Andes Technology, a leading supplier of high-performance, low-power RISC-V processor…
Ian Ferguson from SiFive attended the RISC-V event in Hangzhou, China, in August 2024. Explore his insights on the event's impressive scale, vibrant atmosphere, and the practical "solve real problems"…
SEALSQ Testing its QS7001 RISC V Quantum-Resistant Platform I the Next Generation WISeSat Satellites; Prototype to Launch in November 2024 Geneva, Switzerland, Aug. 28, 2024 (GLOBE NEWSWIRE) -- The satellite,…
LONDON and SANTA CLARA, Calif., Aug. 28, 2024 /PRNewswire/ -- PQShield, a leading quantum-safe cryptography provider, and RISC-V processing pioneer SiFive have partnered to deliver post-quantum cryptography on SiFive's Essential and Performance high-performance processor families, protecting critical aerospace, consumer, defense,…
RISC-V specialist DeepComputing has unveiled a new portable computing gadget, powered by the SpacemIT K1 system-on-chip: the DC-ROMA RISC-V Pad II tablet computer. "DeepComputing is excited to announce the official…
Recently, one of the world’s three major RISC-V professional exhibitions, the largest annual RISC-V event – 2024 RISC-V China Summit was held in Hangzhou, Zhe Jiang Province, RISC-V China Summit…
Seeed Studio’s reCamera AI camera is a modular RISC-V smart camera system for edge AI applications based on SOPHGO SG2002 SoC. The camera is made up of three boards: the…
XiangShan is a RISC-V CPU project out of China, and now hosted on Github. This is a high-performance CPU design, instead of lower performance designs that we have seen from…
Hot Chips RISC-V champion Tenstorrent offered the closest look yet at its upcoming Blackhole AI accelerators at Hot Chips this week, which they claim can outperform an Nvidia A100 in raw…
If the growing number of new RISC-V announcements aren’t enough proof of the license-free protocol’s momentum, there is a mountain of analyst predictions, trend research, and market analysis that seems…
From the IoT edge to the depths of space, RISC-V enables groundbreaking innovations. Join us at the RISC-V Summit 2024, October 22–23, at the Santa Clara Convention Center to discover…
With the need for more robust, quantum-resilient security the company’s new platform represents a significant advancement in securing critical data and infrastructure against the threats posed by quantum computing. The…
DeepComputing is excited to announce the official launch of the DC-ROMA RISC-V Pad II, a groundbreaking product designed to empower the RISC-V community with an advanced mobile terminal experience. By leveraging…
Literally the day after writing the article about the Microchip PolarFire SoC Discovery Kit based on the company’s PolarFire SoC FPGA, Microchip gave me a preview of two closely related…
Wendell checks out the NanoKVM. It's so tiny! Check it out here: https://sipeed.com/nanokvm Watch the video.
The convergence of RISC-V architecture and generative AI is paving the way for revolutionary advancements in hardware security. These technologies promise to enhance the resilience of systems against an array…
Called P870-D, it is an update of the non-data centre P870, with support added for AMBA CHI protocol. “By harnessing a standard CHI bus,” said SiFive, “the P870-D enables SiFive’s…
SiFive has modified its high end RISC-V core for more scalability in datacentre AI chip designs. The P870-D datacentre RISC-V IP is a variant of the previous P870 so that it scales…
Read the full article.
With the support from A-list investors including Kleiner Perkins, Mayfield, and Fidelity the company has announced the formal availability of its expansive line of IP solutions that are customisable for…
Santa Clara, Calif., Aug. 14, 2024 – Today SiFive, Inc., the gold standard for RISC-V computing, announced its new SiFive PerformanceTM P870-D datacenter processor to meet customer requirements for highly parallelizable…
Akeana, the company trying to change semiconductor design, has raised over $100 million in funding in the past three years to design RISC-V processors. Now it’s launching products. Today’s launch…
Starting with the release of Raspberry Pi Model B in 2012, Raspberry Pi has a history of innovation with a strong focus on user experience. Their expansion port designs enable…
Akeana™, the company committed to driving dramatic change in semiconductor IP innovation and performance, has announced its official company launch approximately three years after its foundation, having raised over $100 million in…
Learn how designers benefit from the combination of TASKING's VX Toolset for RISC-V and Synopsys ARC-V™ IP, by gaining access to tools to develop safe, secure, and power-efficient SoCs for…
Academician Ni Guangnan of the Chinese Academy of Engineering has stated that the RISC-V architecture, due to its openness and flexibility, has become one of the most popular choices in…
The Raspberry Pi people have released a new microcontroller board the Raspberry Pi Pico 2. However the star of the show is the new microcontroller chip, the RP2350. It upgrades…
Raspberry Pi has stepped up its chip development with a quad core microcontroller with two ARM Cortex-M33 cores and two in-house RISC-V cores. The $5 Raspberry Pi Pico 2 board…
Raspberry Pi is one of the most recognisable brands of single board computers, created as an affordable way to promote the teaching of computer science to young people, to give…
Nirav & Hyelim sit down at Framework HQ SF to talk about all things RISC-V and DeepComputing. RISC-V Mainboard: https://frame.work/products/deep-comp... Read the blog post: https://frame.work/blog/introducing-a... Watch the full video.
Canonical has announced another new entry in its growing list of RISC-V platforms for which an official Ubuntu Linux image is available, launching an image for Microchip's new PIC64GX family…
The podcast interview explores the role of RISC-V in the automotive sector. It begins with a brief introduction to RISC-V, explaining it as an open standard instruction set architecture (ISA). The…
(Yicai) July 26 -- Central Chinese city of Wuhan has formed a new innovation hub for RISC-V, an open-source instruction set architecture used to design chips. The hub will commit…
Hoehenkirchen, Germany—July 25, 2024 — Lauterbach’s TRACE32® development tools now support Microchip’s 64-bit RISC-V® PIC64GX microprocessor family for power-efficient embedded-compute platforms. TRACE32® tools support includes simultaneous debugging of the RISC-V…
July-23rd , 2024, Limerick, Ireland. Embedded tools developer Ashling is pleased to partner with Microchip Technology, supporting the new and innovative PIC64GX RISC-V based multicore MPUs with our RiscFree™ C/C++…
Imagination Technologies (“Imagination”) today announced a new investment by funds managed by affiliates of Fortress Investment Group LLC (“Fortress”). Under the terms of the agreement, Fortress has provided Imagination with a…
CHANDLER, Ariz., JULY 9, 2024 — The world has changed dramatically in the two decades since the debut of what was then considered a trail-blazing space-grade processor used in NASA missions…
July-8 th, 2024, Kochi, India. Embedded tools developer Ashling is pleased to partner with C-DAC, supporting their VEGA RISC-V based multi-core microprocessor family with our RiscFree™ C/C++ SDK and Opella-XD…
In today’s landscape of generative AI, IoT, and more, the demand for advanced RISC-V core IP is rapidly escalating. As technology becomes increasingly software-driven, the industry has shifted from developing…
In the world of processor development, flexibility is becoming a distinct advantage. As an open-standard instruction set architecture (ISA), the fifth iteration of reduced instruction set computing (RISC-V) embodies this…
Axelera AI Raises $68 Million Series B Funding to Accelerate Next-Generation Artificial Intelligence
Silicon Valley, CA and Eindhoven, NL – June 27, 2024 – Axelera AI, the leading provider of purpose-built AI hardware acceleration technology for generative AI and computer vision inference, today announced…
Munich, Germany — The European tech landscape is witnessing a notable evolution with the growing embrace of RISC-V, the open-source instruction set architecture. During the recent RISC-V Summit Europe, leading…
AI start-up Tenstorrent has announced the commercial release of its Wormhole processors, built to power AI accelerators to compete with Nvidia. Wormhole will power the new Wormhole n150 and n300…
RISC-V ISA is almost 15-year old and RISC-V hardware has been popping up regularly for a while. Until recently it was difficult to find a board with RISC-V Vector support, in particular…
Eggtronic in Italy has added reprogrammable flash memory to its EPIC RISC-V mixed-signal power controller. The Eggtronic RISC-V EPIC 2.0 Flash series provides more flexibility through the design process, while…
As I sat on the plane in Boston it’s fair to say that I was curious about what DAC 2024 would bring. The previous year was much better than I…
The open-source RISC-V instruction set continues to make inroads across the electronics industry. Electronic Design’s and Microwaves & RF’s Bill Wong offer his take on the current status and future…
Microchip has launched its first 64bit microprocessor line, starting with a multicore RISC-V cluster for its PIC64GX family. The PIC64 GX1000 uses the existing RISC-V four core cluster with a…
A decade ago, an idea was born in a laboratory at the University of California at Berkeley to create a lingua franca for computer chips, a set of instructions that…
The RISC-V ecosystem has witnessed significant global investment, particularly from China, which is increasingly positioning itself as a pivotal player in the open-source semiconductor manufacturing landscape. In an exclusive interview…
2024 ANDES RISC-V CON Silicon Valley DEEP DIVE INTO AUTOMOTIVE / AI / APPLICATION PROCESSORS AND SECURITY TRENDS Recently, RISC-V, with its open, streamlined, and scalable configuration, has become the…
2024 ANDES RISC-V CON Silicon Valley DEEP DIVE INTO AUTOMOTIVE / AI / APPLICATION PROCESSORS AND SECURITY TRENDS Recently, RISC-V, with its open, streamlined, and scalable configuration, has become the…
SEALSQ Corp ("SEALSQ" or "Company") (NASDAQ: LAES), a leader in developing and selling semiconductors, PKI, and post-quantum technology hardware and software products, announces the breakthrough adoption and future potential of…
CHANDLER, Ariz., July 9, 2024 — Real-time, compute intensive applications such as smart embedded vision and Machine Learning (ML) are pushing the boundaries of embedded processing requirements, demanding more power-efficiency, hardware-level security…
CHANDLER, Ariz., JULY 9, 2024 — The world has changed dramatically in the two decades since the debut of what was then considered a trail-blazing space-grade processor used in NASA…
With the ability to shift computing resources as needed, Microchip’s new 64-bit, RISC-V processors bring needed flexibility to embedded edge devices. Microchip has announced two new multi-core 64-bit MPUs operating…
RISC-V is clearly gaining momentum across many applications. That was quite clear at #61DAC as well. Breker Verification Systems solves challenges across the functional verification process for large, complex semiconductors.…
Microchip is qualifying an eight core fault tolerant RISC-V processor for AI in space applications. The radiation tolerant PIC64-HSPC octal core 1.2GHz switch provides 26K DMIPS and is built on…
Microchip has launched its first 64bit microprocessor line, starting with a multicore RISC-V cluster for its PIC64GX family. The PIC64 GX1000 uses the existing RISC-V four core cluster with a…
Munich, Germany — During the recent RISC-V Summit Europe, EE Times had the opportunity to talk to a leading RISC-V researcher Frank Kagan Gürkaynak, a senior scientist at ETH Zürich…
European startup Vybium is developing am AI accelerator chip using the open RISC-V instruction set architecture to take on the Nvidia A100 GPU in the data centre. Vybium is a…
In this course, our Founder and CEO, Mr. P R Sivakumar, explains the layered architecture of RISC-V open ISA and how we chip designers design various chips like simple embedded…
At this year’s Design Automation Conference (DAC), I was told that the committee had received some 1,500 technical paper and presentation submissions, and a 34% increase in research paper submissions,…
Milk-V , a developer of RISC-V-related hardware, has announced the Milk-V Jupiter, a Mini-ITX motherboard equipped with a RISC-V processor. Milk-V Jupiter | RISC-V PC for Everyone https://milkv.io/jupiter RISC-V is…
This weekend we ended up working a lot on two RISC-V designs in a push to get the final PCBs out the door. First up is the CH32v203 QT Py.…
Germany was buzzing this week. No, not because of the Euros. Munich also hosted the 2024 edition of the RISC-V Summit Europe, and Codethink was in town! RISC-V Summit Europe…
RAID RISC-V NAS built using a Banana Pi BPI-F3 single board computer and a JMB582 PCIe to SATA adapter. Watch the video.
This week, the 2024 edition of RISC-V Summit Europe took place in lovely Munich, Germany. Those of us who attended last year’s edition in Barcelona might not have expected the…
At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe. It’s been a big week for open-source processors as the…
Munich, Germany. SiFive, Inc. announced an innovative design of its SiFive Essential product family at the RISC-V Summit Europe 2024. With over a decade of development, the Essential IP has demonstrated…
Axiomise’s Nicky Khodadad and Ashish Darbari discuss simulation and the need for formal verification and RISC-V, including why simulation-based verification is inadequate to find all the bugs in a design…
SiFive is seeing growing adoption, with more than two billion SiFive RISC-V-based chips already in the market. SiFive, Inc. the gold standard for RISC-V computing, unveiled a major upgrade of…
RISC-V is an emerging choice for semiconductor companies to create highly differentiated products for a wide range of end applications. Both established players and start-up companies are investing heavily and…
Semidynamics Tensor Unit efficiency data for its “All-In-One” AI IP, which uses a LlaMA-2 7B-parameter Large Language Model (LLM), has been made public. Roger Espasa, Semidynamics’ CEO, explained, “The traditional…
Combining IP from two RISC-V leaders with an independently developed NPU brings advanced AI acceleration and rich user interfaces to ESWIN Computing’s EIC77 Series SoCs. June 25, 2024 -- Today,…
SiFive announced the 4th generation of RISC-V CPU cores for embedded applications at RISC-V Summit Europe 2024 today. There are eight cores, three of which are 32bit while the other…
Watch the first of our roundups from DAC 2024, taking place this week at the Moscone Center in San Francisco, where we talk about the EDA, tools and support for…
Spanish RISC-V IP developer Semidynamics has benchmarked the performance of its Tensor Unit running a LlaMA-2 7B-parameter Large Language Model (LLM) on an ‘all in one’ RISC-V AI IP core.…
SAN DIEGO, June 25, 2024 /PRNewswire/ -- X-Silicon is demonstrating the 1st Vulkan™ Software Rendering Platform capability running on the RISC-V Architecture. This opens up a new segment of low-power…
SiFive is seeing growing adoption, with more than two billion SiFive RISC-V based chips already in the market Munich, Germany, June 25, 2024 – Today SiFive, Inc. the gold standard for…
Spanish RISC-V IP developer Semidynamics has benchmarked the performance of its Tensor Unit running a LlaMA-2 7B-parameter Large Language Model (LLM) on an ‘all in one’ RISC-V AI IP core…
June-24 2024, RISC-V European Summit, Munich, Germany. Embedded tools developer Ashling today announced support for the Renesas R9AG021 RISC-V MCUs from Renesas in Ashling’s RiscFree software development kit (SDK) and…
MUNICH, Germany – June 24, 2024 – RISC-V International, the global open standards organization, announced that Andrea Gallo has joined as the organization’s new vice president of Technology. Gallo heads…
Industry Veteran Brings Software and Hardware Experience to Role Guiding all RISC-V Technical Activities MUNICH, Germany – June 24, 2024 – RISC-V International, the global open standards organization, announced that Andrea Gallo…
Veyron Solution — World’s Highest Performance Data RISC-V Processor and Platform — Will Be Showcased Throughout Event CUPERTINO, Calif. – June 24, 2024 – Ventana Micro Systems Inc., provider of…
RISC-V is an open standard instruction set architecture that has potential to be widely used as an alternative to existing ARM and x86 solutions. For the software developers it's beneficial…
Andes Technology Showcases Leadership in AI and Automotive Applications at RISC-V Summit Europe 2024
Industry-leading RISC-V solutions and live demonstrations of CPU IP are all on display at Booth #8. Discover the latest advancements from Andes’ presentations and posters! Munich, Germany – June 21,…
SAN JOSE, Calif., June 20, 2024 (GLOBE NEWSWIRE) -- Breker Verification Systems, whose product portfolio solves challenges across the functional and system verification process for large, complex semiconductors, today unwrapped its…
As RISC-V gains traction as an open-source alternative to Arm, several companies have announced partnerships and research to bolster the ISA. Forecasts show that AI will continue to fuel RISC-V…
Welcome to the Ultimate Guide to RISC-V Architecture. In this course, our Founder and CEO, Mr. P R Sivakumar, explains the layered architecture of RISC-V open ISA and how we…
Synopsys has expanded its ARC processor portfolio to include a family of RISC-V processors. This was originally reported on SemiWiki last October. There is also a recent in-depth article on the make-up…
Sipeed has announced a new entry in its Lichee RISC-V family, this time putting its high-performance Lichee 4A RISC-V system-on-module into a full-size laptop chassis: the Lichee Book 4A. "Lichee…
The IAR safety-certified C-STAT tool is now available in the Functional Safety editions of IAR Embedded Workbench for RISC-V, ARM, and Renesas RL78 architectures. The latest IAR Embedded Workbench for…
Today, RISC-V pioneer DeepComputing announced that their first RISC-V Mainboard, compatible with the Framework Laptop 13, is about to be released. Sporting a RISC-V StarFive JH7110 SoC, this groundbreaking Mainboard was…
Alexander Conklin, Head of Hardware Engineering, Rain AI The compute intensive demands of AI workloads have given rise to a new era in accelerator design. In this talk we’ll take…
RISC-V Banana Pi BPI-F3 development board review and specifications, including demonstrations running Bianbu OS from SpaceMIT (who also developed the K1 RISC-V SoC on which this SBC is based). Watch…
DeepComputing partners with Canonical to unveil a huge boost to the DC-ROMA RISC-V Laptop family The DC-ROMA RISC-V Laptop II is the world’s first RISC-V laptop pre-installed and powered by…
Florian "Flo" Wohlrab, CEO of OpenHW Group, leads a Canadian-based nonprofit that operates globally, focusing on open-source hardware. The organization specializes in creating industrial-grade, fully open-source RISC-V cores that are…
Hoehenkirchen, Germany - June 13, 2024 - Under the headline "RISC-V Debugging made Easy", Lauterbach, the leading supplier of RISC-V debug and trace tools, will demonstrate at the RISC-V Summit…
DeepComputing partners with Canonical to unveil a huge boost to the DC-ROMA RISC-V Laptop family The DC-ROMA RISC-V Laptop II is the world’s first RISC-V laptop pre-installed and powered by…
LONDON, June 13, 2024 (GLOBE NEWSWIRE) -- Axiomise, a company noted for enabling formal verification adoption, is headed to the RISC-V Summit Europe to demonstrate formalISA, its automated formal RISC-V…
Munich, Germany, June 4, 2024 – Codasip, the leader in RISC-V Custom Compute, has introduced a new low-power embedded processor core, and the next generation of processor design automation toolset…
ANDES had their RISC-V Con in Silicon Valley on June 11th. No worries if you weren't able to make it, watch the full conference to learn more! Watch the full…
CAMPBELL, Calif. – June 11, 2024 – Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced that Esperanto Technologies™, a leading developer…
This panel will discuss the state of standardized cryptographic instruction set extensions for RISC-V processors. Lightweight instructions for scalar CPUs, high-performance instructions for vector CPUs, an entropy source interface, and…
Mouser now stocks the R9A02G021 low-power MCUs from Renesas Electronics. Empowering engineers with a multipurpose platform for creating power-efficient, cost-effective applications using an open-source ISA, the R9A02G021 is the company's…
Earlier this year Chinese chip maker SpacemiT announced plans to launch several new products powered by the company’s RISC-V processors, including the SpacemiT Muse Book laptop, Muse Box mini PC,…
Andes Technology Announces the Annual ANDES RISC-V CON on June 11th at the DoubleTree San Jose Hotel
San Jose, CA — Jun 6, 2024 — Andes Technology (TWSE: 6533), the leading vendor in high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier member of RISC-V International,…
Soham shares his knowledge about RISC-V at the MumbaiFOSS 2024 Conference! Watch the full video here.
Embeetle was founded by three engineers with unique insights into embedded software IDEs. The Embeetle team is committed to building a healthy MCU ecosystem, offering convenience to manufacturers and developers.…
BENGALURU, India, June 3, 2024 /PRNewswire/ -- Calligo Technologies Pvt Ltd, a pioneering tech firm based in Bengaluru, India, proudly announces the world's first 8-core Posit-enabled RISC-V CPU – TUNGA, in…
San Francisco, CA , June 03, 2024 (GLOBE NEWSWIRE) -- Rain AI Licenses Andes AX45MPV and Taps Andes Custom Computing BU to Accelerate Its Launch of Groundbreaking Compute-In-Memory (CIM) Generative…
Andes Technology, a supplier of 32/64-bit RISC-V processor cores, has unveiled the QiLai SoC and the Voyager development board to help accelerate the development and porting of large RISC-V applications.…
May 30, 2024 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International,…
If you’re interested in building your very own 256-Core RISC-V supercomputer, you might find this project video intriguing. It details the ambitious method of creating a 256-core RISC-V supercomputer using…
The 1.0 RISC-V Vector Specification is now Ratified, and the first pieces of silicon using the new spec are starting to hit the shelves. I go over the utility of…
RT-Thread IoT OS is thrilled to unveil the agenda for the highly anticipated 2024 RT-Thread Global Tech Conference (RGTC). This year’s event promises to be a remarkable gathering of industry…
GCT Semiconductor has developed the first multi-mode LTE chipset for the 450MHz spectrum, using two RISC-V cores. The GDM7243SL developed by GCT is the world’s first highly integrated multi-mode LTE…
Canonical has been releasing Ubuntu RISC-V images for SBCs and QEMU at least since 2021. The latest addition is an Ubuntu 24.04 Server image for the Mars credit-card-size SBC powered…
May 28th, 2024 – Canonical announced that the optimised Ubuntu 24.04 image is available for Milk-V Mars, the first credit-card-sized high-performance RISC-V Single Board Computer (SBC) delivered by Shenzhen MilkV Technology Co., Ltd.…
RISC-V technology is revolutionizing the microchip industry, challenging established giants and paving the way for transformative changes. By the end of 2022, the industry had already embraced over 10 billion…
RISC-V – never heard of it? The open-source processor architecture is relatively new, but already making big waves as the ISA for all sorts of applications. In this talk media.ccc.de…
Dive into the world of RISC-V processors with Loren Hobbs, VP of Product and Business Development at Bluespec, an Achronix partner. This detailed presentation will equip you with essential knowledge…
Highlights: – Andes Technology and Arteris partnership aims to support the growing adoption of RISC-V SoCs by mutual customers. – Focus is on high-performance/low-power RISC-V-based designs across a wide range…
AI and automotive applications will help the RISC-V open-standard instruction set architecture (ISA) take nearly 25 percent of the processor market by 2030, according to Omdia. The market analyst predicts…
The global RISC-V ecosystem is growing rapidly, particularly in the U.S. and China, and consists of nearly four thousand members. This provides a wide choice of technology partners and ensures…
RISC-V chips are set to become a global powerhouse in the 2020s, with a market share of almost 25% by 2030, according to research by Omdia. The forecast outpaces even RISC-V…
May 14, 2024 —Andes, HiRain, and HPMicro jointly announced that the three parties will cooperate to combine the AndesCoreTM RISC-V processor series, the HPMicro HPM6200 full line of products, and the HiRain…
LONDON, May 16, 2024 /PRNewswire/ -- RISC-V processors will account for almost a quarter of the global market by 2030, according to new research by Omdia. The open-standard instruction set architecture (ISA) is predicted to experience…
DUBLIN--(BUSINESS WIRE)--The "Global and China Automotive RISC-V Chip Industry Research Report, 2024" report has been added to ResearchAndMarkets.com's offering. The automotive industry is witnessing a significant shift towards the adoption of RISC-V chips, as…
MOUNTAIN VIEW, Calif., May 15, 2024 – Esperanto Technologies™, the leading developer of high-performance, energy-efficient artificial intelligence (AI) and high-performance computing (HPC) solutions based on the RISC-V instruction set, today announced…
Scaleway by way of their Scaleway Labs group recently launched the Elastic Metal RV1 (EM-RV1) as the world's first RISC-V servers available in the cloud. These RISC-V cloud servers are…
AGL’s latest UCB release advances SDV development and takes a software-first approach with support for AWS Graviton and Toyota Embedded Flutter Automotive Grade Linux (AGL), a collaborative cross-industry effort developing an…
GOTHENBURG, Sweden--(BUSINESS WIRE)--Under a contract with the European Space Agency (ESA), Frontgrade Gaisler is designing a new RISC-V processor tailored to meet the requirements of microcontrollers for the space industry.…
MerlinTPS is to use a RISC-V processor core from Bluespec for satellite navigation augmentation and backup technology. The deal marks the start of the next phase of MerlinTPS’ next-generation platform…
The new RISC-V-based SoC is the first microprocessor owned, designed, and marketed entirely from India to the open market. While semiconductor technology is a matter of national security for almost…
SAN FRANCISCO, May 9, 2024 /PRNewswire/ -- Automotive Grade Linux (AGL), a collaborative cross-industry effort developing an open source platform for all Software-Defined Vehicles (SDVs), has announced the latest code release of the AGL…
RISC-V technology is beginning its inroads into automotive electrical/electronic (EE) architecture design. Four major trends are driving this evolution: the surge in electric vehicles (EVs), advances in self-driving technology, the emergence…
SAN DIEGO, May 1, 2024 /PRNewswire/ -- X-Silicon Inc (XSI), a San Diego-based startup, announced today their new NanoTile open-standard low-power "C-GPU" architecture that infuses GPU acceleration into a RISC-V Vector CPU Core with tightly…
Microchip Technology has launched a radiation tolerant version of its PolarFire FPGA with a RISC-V processor sub-system that can run the Linux operating system. The Microchip RT PolarFire system-on-chip (SoC)…
RISC-V “is changing the way people build every single computer,” says Mark Himelstein, the former CTO at RISC-V International. He joins us to explain the significance of the RISC-V ISA,…
RISC-V has been an industry buzzword over the last few years, making waves with a range of wacky devices and chips from all sorts of manufacturers. This often-hyped technology has sometimes…
Welcome to another episode of the Electropages podcast. Today, host Robin Mitchell is joined by Charlie Hauck, CEO of Bluespec Inc, to explore the latest developments in RISC-V technology and…
TASKING has introduced the new compiler toolset VX-Toolset for RISC-V. The industry's first ISO 26262 and ISO/SAE 21434 compliant compiler enables the development of automotive embedded software that fulfills stringent…
Understanding the intricacies of software timing behaviour is crucial, especially in safety-critical systems and systems with real-time requirements. While analysing timing on single-core processor architecture might seem straightforward, the landscape…
SYSGO released its support for RISC-V via its embedded Linux ELinOS version 7.2. The platform fully supports Microchip's PolarFire SoC Icicle. The ratification also sees fixes for the 2038 bug…
RISC-V has emerged as a groundbreaking force in the semiconductor industry, fundamentally changing the CPU design and manufacturing landscape. By providing an open standard instruction set architecture (ISA), RISC-V has…
An international collaboration between BSC and Instituto ELDORADO will enable Brazil to develop open-source RISC-V technologies to accelerate research and development in the areas of semiconductors and supercomputing. The primary goal of this project…
Embedded World 2024 proved that the industry is becoming more competitive as rapid innovations emerge across a number of different sectors and elements of the product solution stack. With engineering…
RISC-V International has succeeded in ratifying 40 new technical specifications relating to the RISC-V instruction set architecture (ISA) over the course of the last 2 years. This means that engineers…
In recent years, India's semiconductor industry has witnessed remarkable growth and innovation, fueled by a combination of several innovations, strategic partnerships, and technological advancements. At the heart of this revolution…
RISC-V’s popularity stems from its open-source framework, enabling customization, scalability, and mitigating vendor lock-in. Supported by a robust community, its cost-effectiveness and global adoption make it attractive for hardware innovation…
RISC-V, an open standard instruction set architecture (ISA), is rapidly shaping the future of high-performance computing, edge computing, and artificial intelligence. The RISC-V customizable and scalable ISA enables a new…
All entries are judged using a 15-point rubric, that assesses design excellence, relative performance, and market impact/disruption. Judging is managed by the ECD Content Team. Read the full article.
Calista Redmond, the CEO of RISC-V International, spoke at Embedded World 2024, highlighting the growth and global presence of RISC-V. With over 2300 members in 70 countries, RISC-V is experiencing…
TASKING has introduced the industry’s first ISO 26262 and ISO/SAE 21434 compliant compiler toolset, designated VX-Toolset for RISC-V. The compiler facilitates the development of automotive embedded software that meets stringent…
Following up on our previous reporting on the changes at UK-based Imagination Technologies, the company announced a new RISC-V applications processor IP, the Imagination APXM-6200 CPU, at the 2024 Embedded World conference.…
HiFive Premier P550 is the highest performance RISC-V development board on the market, offering developers unmatched flexibility and performance Nuremberg, Germany – April 9, 2024 – Today at Embedded World, SiFive,…
Imagination Technologies today unveils the next product in the Catapult CPU IP range, the Imagination APXM-6200 CPU: a RISC-V application processor with compelling performance density, seamless security and the artificial intelligence capabilities needed to…
Uppsala, Sweden, April 8, 2024 - IAR, the leader in software solutions and services for embedded development, has joined forces with Nuclei System Technology and MachineWare to accelerate innovation in…
LONDON--(BUSINESS WIRE)--Imagination Technologies today unveils the next product in the Catapult CPU IP range, the Imagination APXM-6200 CPU: a RISC-V application processor with compelling performance density, seamless security and the…
NAME is a talk presented by Markku-Juhani O. Saarinen at RWC 2024. This was the first talk in a session on post-quantum implementations, chaired by Thomas Prest. Watch the full…
RISC-V annual update, covering developments in RISC-V hardware and software including RISE, Quintaris, and AI accelerators. Watch the full video.
Semidynamics has announced an all-in-one unified IP solution that combines RISC-V, vector, tensor and its own Gazzillion technology to enable implementation of AI workloads using just one instruction set and…
Ahead of Embedded World next week, RISC-V International has highlighted 40 technical specifications it has ratified in the past two years covering the key areas of efficiency, vector and virtualization.…
ZURICH – April 4, 2024 – RISC-V International, the global standards organization, today announced that 40 new technical specifications have been ratified in the past two years, adding to an extensive list of…
SAN JOSE, CA – April 04, 2024 – MIPS, a leading developer of efficient and configurable IP compute cores, today announced that it has expanded its collaboration with Synopsys, Inc. to accelerate ecosystem enablement…
YuzukiHD’s Eight-Core Avaota-A1 Includes a 2 TOPS NPU, RISC-V “Remote CPU,” and Connectivity Aplenty
Embedded hardware specialist YuzukiHD is preparing to launch a single-board computer built around the Allwinner T/A527 system-on-chip (SoC) and boating a RISC-V "remote CPU" and two tera-operations per second (TOPS)…
Axiomise formal verification is about making formal verification normal by deploying consulting and services on customer projects, leveraged by Axiomise training and formalISA for RISC-V. The Axiomise team explains why…
This session will focus on a demonstration using the RISC-V specification incorporated into a Sinfonia project. Sinfonia utilizes it’s ingested knowledge of RISC-V and the enriched understanding from the LLM…
Signaloid C0-microSD is an FPGA development board based on the popular iCE40 FPGA from Lattice Semiconductor in a microSD form factor. You can use it to prototype your designs on a…
Uppsala, Sweden, March 27, 2024 - IAR, the leader in software solutions and services for embedded development, is proud to announce enhancements to its premier development environment to support the…
A hot potato: Many PCIe 5.0 SSDs currently on sale provide extremely high transfer rates compared to previous generations, however they all appear to require an often-cumbersome cooling solution to avoid…
A demo of Yingren Technology's YRS820 PCIe 5.0 SSD controller – built entirely on the RISC-V architecture – showed it reading at 14GB/sec and writing at 12GB/sec, without any active…
Since October 2020, Renesas has been officially active in the RISC-V microcontroller space and successfully launched two ASSP products, for motor control and voice-driven HMI systems. Now a general-purpose MCU…
"I redesigned my mini game to use the new CH32X035 chip. It supports full speed USB mass storage now, got an LDR for new features and runs an interpreter that…
SANTA CLARA, Calif. & FRAMINGHAM, Mass.--(BUSINESS WIRE)--Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, and Bluespec, Inc., an industry leader in RISC-V tools and silicon…
TOKYO, Japan ― Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, today announced the industry’s first general-purpose 32-bit RISC-V-based microcontrollers (MCUs) built with an internally developed CPU core.…
Dan is joined by Matt Gutierrez. Matt joined Synopsys in 2000 and is currently Sr. Director of Marketing for Processor & Security IP and Tools. His current responsibilities include the…
On September 13, 2021, Andes Technology Corporation successfully issued its GDR (Global Depositary Receipt) public offering on the Luxembourg Stock Exchange. At the time it made Andes the only international public RISC-V…
Efinix in California has launched a line of FPGA devices with 32bit RISC-V cores specifically for the automotive industry. The Titanium Ti375 is automotive qualified and with the Efinix Efinity tool…
SANTA CLARA, Calif., March 13, 2024 /PRNewswire/ --Tenstorrent and MosChip Technologies announced today that they are partnering on design for Tenstorrent's cutting-edge RISC-V solutions. In selecting MosChip Technologies, Tenstorrent stands to strongly…
SAN JOSE, Calif.--(BUSINESS WIRE)--MIPS, a leading developer of efficient and configurable compute cores, today announced the company’s global expansion with the launch of a new R&D center in Austin, TX,…
SHANGHAI--(BUSINESS WIRE)--VeriSilicon (688521.SH) today announced the successful integration of its Display Processor IP DC8200 into StarFive’s JH-7110 RISC-V mass production SoC. With high performance, low power consumption and high security…
A novel AI-acceleration paper presents a method to optimize sparse matrix multiplication for machine learning models, particularly focusing on structured sparsity. Structured sparsity involves a predefined pattern of zero values in the…
Watch the full video.
DUBLIN, March 14, 2024 /PRNewswire/ -- The "Automotive RISC-V Chip Industry Research Report, 2024" report has been added to ResearchAndMarkets.com's offering. Read the full release.
SHANGHAI--(BUSINESS WIRE)--VeriSilicon (688521.SH) today announced the integration of its Image Signal Processor (ISP) IP ISP8000, DeWarp Processor IP DW200, and 2.5D Graphics Processor Unit (GPU) IP GCNanoV into Canaan’s K230…
SANTA CLARA, Calif., March 13, 2024 /PRNewswire/ --Tenstorrent and MosChip Technologies announced today that they are partnering on design for Tenstorrent's cutting-edge RISC-V solutions. In selecting MosChip Technologies, Tenstorrent stands to strongly…
Munich, Germany, 13 March 2024 –Codasip, the leader in RISC-V Custom Compute, will demonstrate CHERI memory protection and HW/SW co-optimization at next month’s embedded world 2024 in Nuremberg, Germany. The…
Congratulations on your selection as a 2024 HPCwire Person to Watch. As a longtime electronics industry executive and the former president of the member-driven OpenPOWER organization, could you tell us…
【Mar. 12, 2024 -Hsinchu, Taiwan】Andes Technology (TWSE: 6533), since the first agreement signed with National Chiao Tung University in 2010, has actively keeping engaged in industry-academia collaboration. Collaborating with universities…
RISC stands for reduced instruction set computer, and V points to its fifth release in 2015. RISC-V is the new processor architecture to watch out for. Arm-based processors, which stayed among…
Grenoble, France – March 8, 2023 – As security is increasingly the central issue of any SoC (System on Chip) development, for example taking into account initiatives like the Cyber Resilience…
Are you ready to step inside one of the premier conferences in the electronics industry? SNUG Silicon Valley 2024 will be back at the Santa Clara Convention Center in March,…
The next supercomputing chip for Europe’s homegrown Exascale supercomputer will come next year, according to an updated product roadmap. The 2025-bound Rhea-2 chip will succeed the Rhea-1 chip, the ARM-based…
Paul Schell, Industry Analyst at ABI Research, discusses the growing start-up and legacy chipset vendor activity around RISC-V processors addressing AI workloads at the edge and highlights how this trend…
Karel Masarik is the founder of Codasip and since January 2024 also a member of the board of RISC-V International. Recently, EY named Karel Masarik the regional Entrepreneur of the year…
The need for more flexible and scalable processor architectures in the semiconductor industry continues to rise, contributing to the steady growth in the adoption of RISC-V. Originally developed at the…
Introduction to RISC-V RISC-V (pronounced as risk five) is an open standard Instruction Set Architecture (ISA) based on Reduced Instruction Set Computing (RISC) computer architecture. Unlike proprietary ISAs, RISC-V is…
This video demonstrates high performance and asynchronous clocking using HAPS®-100 and HAPS ProtoCompiler software. The design uses a RISC-V Rocket System integrated highspeed DDR 4, and Synopsys DW PCIE Gen…
Semidynamics has released its new tool called ‘Configurator’ that puts the power of Semidynamics’ full customisation of a RISC-V processor core in the hands of the customer. The Configurator uses…
In this installment of SBT's C-Suite Spotlight, President Justin Kinsey has a conversation with CEO of RISC-V International, Calista Redmond. Calista's early career was focused on creating startups, which gave…
SHANGHAI--(BUSINESS WIRE)--VeriSilicon (688521.SH) today announced that HPMicro’s HPM6800 series, a new generation digital dashboard display and human-machine interface system application platform has adopted VeriSilicon’s high-performance 2.5D Graphics Processor Unit (GPU)…
Imsys in Sweden has developed a RISC-V processor core and is part of a project to develop an AI accelerator in space. Imsys points to a general EU strategy to…
Paris, France - Thursday, February 29, 2024 - Scaleway, the European cloud provider, is proud to launch a range of RISC-V servers, marking once again its commitment to innovation and its…
The technology community – both innovators and implementers – is at a critical juncture in 2024. Global market pressures are starting to ease, but persistent geopolitical threats are hindering progress.…
Aachen, Germany and Hsinchu, Taiwan, February 27th 2024 MachineWare GmbH and Andes Technology (TWSE:6533), a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International…
Japan’s Leading-edge Semiconductor Technology Center, or LSTC, was established in late 2022 and is tasked with advancing the country’s research and innovation in areas such as nanotechnology, chip manufacturing, semiconductor…
SiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s Lobby podcast to provide his insights on the success of SiFive…
SANTA CLARA, Calif., Feb. 27, 2024 /PRNewswire/ -- Tenstorrent is pleased to announce a multi-tiered partnership deal with Japan's Leading-edge Semiconductor Technology Center (LSTC), which selected Tenstorrent's world-class RISC-V and Chiplet IP for its…
Feb 23, 2023 SILICON VALLEY, CA, USA. Ashling and MIPS announced today that Ashling’s RiscFree SDK is now available with full support for MIPS RISC-V ISA based CPUs including the…
Feb 22, 2024 — RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world’s first automotive-grade CMOS image sensor series using…
Feb 22, 2024 — RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world’s first automotive-grade CMOS image sensor series using…
Dr Tadej Murovič of Codasip discussed how RISC V and Codasip are revolutionizing the future of processor design. Watch the full video.
Platima Tinkers on YouTube reviewed the BeagleV-Fire. Watch the full video.
Axiomise pioneered the adoption of formal verification in the semiconductor industry since 2017. Led by visionary CEO, Dr. Ashish Darbari, who has 63 patents in formal verification, and Neil Dunlop an…
Andy Moore, Senior Marketing Manager of RISC-V International discussed how RISC-V is shaping the future of compute at State of Open Con 2024. Watch the full video.
LONDON, Feb. 14, 2024 /PRNewswire/ -- Reduced Instruction Set Computing (RISC)-V processor architectures are starting to address edge Artificial Intelligence (AI) workloads, and this trend is set to continue throughout…
Red Hat has always been an advocate of growth at the intersection of open source and computing solutions–which is exactly where RISC-V can be found. RISC-V is one of those…
Speaker: Samuel Chiang , Andes Deputy Director Of Marketing Abstract: In this unique webinar, we take a look at the overview of the latest AndesCore™ RISC-V processor IP lineup. The…
Cryptographic hash functions play a critical role in computer security providing a one-way transformation of sensitive data. Many information-security applications benefit from using hash functions, specifically digital signatures, message authentication codes, and…
IP collaborations helped propel RISC-V-based innovation in Europe last year, targeting processing speeds that meet the growing performance requirements of artificial intelligence and machine learning applications. The ability of RISC-V…
The EU-funded MEEP project introduced a large-scale field programmable gate array (FPGA) system involving a complete collection of hardware intellectual properties (IPs) and software components. These were seamlessly integrated into…
Most of Banana Pi’s single-board computers are powered by ARM-based processors. But the upcoming Banana Pi BPI-F3 has a RISC-V processor instead. The company says the SpacemiT RISC-V K1 processor selected for this board…
Zurich, 17 January 2024 – Klepsydra AI, a leading provider of artificial intelligence (AI) software solutions, and Frontgrade Gaisler, a world leader in embedded computer systems for harsh environments, have announced…
January-30, 2024, Limerick, Ireland. Embedded tools developer Ashling today announced support for the L31 low-power RISC-V processor core from Codasip in Ashling’s RiscFree software development kit (SDK) and Opella-XD Debug…
Munich, Germany, 1 February 2024 – Codasip®, the leader in RISC-V Custom Compute, announced today that it has achieved certification for the functional safety standard ISO 26262 as well as…
Processor Akurra, modifies the standard RISC-V architecture and instruction set to support their memory allocation technology. VyperCore, a UK-based startup located in Bristol, has achieved a significant milestone in the…
SAN JOSE, Calif., Jan. 30, 2024 /PRNewswire/ -- RISC-V is a free, open RISC instruction set architecture (ISA) that is currently gaining popularity due to its high performance, flexibility, and cost-efficiency. RISC-V advantages are…
RISC-V is revolutionising edge computing and fundamentally reshaping the broader computing landscape by promoting innovation, collaboration, and democratisation. RISC-V, an open-source instruction set architecture (ISA), is emerging as a significant…
By Mark Himelstein , CTO, RISC-V International Mark Himelstein What are the top five trends for the RISC-V open standard ISA in 2024? This year has been a great one…
Dutch chip startup Innatera has launched the Spiking Neural Processor T1 to target the edge AI sensor market. Read the full article.
RISC-V is revolutionising edge computing and fundamentally reshaping the broader computing landscape by promoting innovation, collaboration, and democratisation. RISC-V, an open-source instruction set architecture (ISA), is emerging as a significant…
EDA is transforming from a staid but strategic sector into a hot investment market, fueled by strong earnings and growth, a clamoring for leading-edge and increasingly customized designs across new…
With Linus Torvalds back to work, merged to mainline on Wednesday were the RISC-V architecture updates for the in-development Linux 6.8 kernel cycle. One of the features for RISC-V with Linux 6.8 is…
The last time we spoke with Sandi Habinc, General Manager, and Jan Andersson, Director of Engineering at Frontgrade Gaisler, we were discussing the TRISAT-R CubeSat and Gaisler’s use of RISC-V’s open standard instruction set…
Sent in last week were all of the media driver updates for Linux 6.8. Arguably most notable is the introduction of the StarFive Camera Subsystem driver as a new image…
VyperCore in the UK has passed a major development milestone in the development of a new chip architecture starting with RISC-V. Bristol-based VyperCore is developing an architecture to embed functions…
RISC-V processors are quickly becoming mainstream. The open standard means freedom for many developers, but success depends on the development of a support ecosystem around RISC-V. Industry collaboration is making…
Watch the full video.
When faced with an FPGA, some people might use it to visualize the Mandelbrot set. Others might use it to make CPUs. But what happens if you combine the two?…
SAN RAMON, CA, 94582 -- January 17, 2024 -- YorChip, Inc. announces its first Chiplet for Edge AI applications with IP licensed from Semidynamics, the leader in RISC-V IP based in…
Understanding program behavior in complex systems is not easy. Understanding the behavior of complete systems is even more challenging. Get non-intrusive, full-speed and system-level visibility with E-Trace. Processor trace gives…
A Norwegian chip startup is aiming to eliminate the need for batteries in trillions of devices across the Internet of Things (IoT) Kjetil Meisal, CEO of ONiO talks to Nick…
RISC-V, an open-source instruction set architecture (ISA), has been making waves in the world of computer architecture. “RISC-V” stands for Reduced Instruction Set Computing (RISC) and the “V” represents the…
Sameer Wasson is passionate about RISC-V architecture and recently became CEO of MIPS to show the world how important an architecture it is. He uses words like “freedom” when talking…
SEGGER is excited to announce the new Embedded Studio - V8.10. This cutting-edge, multi-platform IDE now also supports multiple architectures with a single setup. The same software can be used to build…
DFRobot has launched a new FireBeetle 2, swapping out the original design's Espressif ESP32-S3 chip for the RISC-V-based ESP32-C6 — which brings with it support for Wi-Fi 6 (IEEE 802.11ax)…
The new CPU features the company’s first out-of-order architecture for higher instruction throughput, better performance, and faster processing speeds. Read the full article.
The BeagleBoard family of modules is built around a dual 46-pin BeagleBone cape header. The BeagleV-Fire is the latest platform. In the demo, a BeagleBone cape with interfaces is used…
The China Academy of Sciences has reported on a chiplet-based architecture of “Big Chip” as a means of exploring the challenges and options for scaling processor performance. The research team…
Hsinchu, Taiwan, Jan. 08, 2024 (GLOBE NEWSWIRE) -- Andes Technology (TWSE: 6533), a leading supplier of 32/64-bit, high-performance and low-power RISC-V processor cores and a Founding Premier member of the…
SAN JOSE, Calif., January 8, 2024 (Newswire.com) - The SHD Group, a leading trade analyst and business development firm, today announced the release of a free version of the 2024 RISC-V…
Hsinchu, Taiwan, Jan. 04, 2024 (GLOBE NEWSWIRE) -- Andes Technology, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today proudly…
WCH has launched some interesting RISC-V microcontrollers in the last year or so, including the “10 cents” CH32V003 RISC-V microcontroller with 2KB SRAM and 16KB flash or the CH32V307with more resources (up to…
MUNICH--(BUSINESS WIRE)--Semiconductor industry players Robert Bosch GmbH, Infineon Technologies AG, Nordic Semiconductor ASA, NXP® Semiconductors, and Qualcomm Technologies, Inc., have formally established Quintauris GmbH. Headquartered in Munich, Germany, the company…
Antmicro’s work with CHIPS Alliance’s Caliptra Root of Trust project, led by Google, AMD, NVIDIA, and Microsoft focuses around providing automated testing and verification infrastructure including code quality checks, code indexing, coverage and…
Synopsys ARC-V Processor IP delivers the optimal power-performance-efficiency and extensibility of ARC processors with broad software and tools support from Synopsys and the expanding RISC-V ecosystem. Watch Now.
Qualcomm and four other significant semiconductor firms have officially joined forces to establish Quintauris, a company focused on developing "next-generation hardware" based on the RISC-V open-standard architecture (via Business Wire). The…
RISC-V-based processors have been making inroads into a wide range of applications, from tiny microcontrollers to data center processors. However, RISC-V hasn't been used for many consumer or gaming devices (except,…
In 1991, when Linus Torvalds created Linux, an open-source operating system, it threatened Microsoft’s business as Linux was an alternative to one of its core products-Windows. The open-source nature of…
As a regular attendee of the RISC-V Summit US, I’ve come to appreciate the unique blend of cutting-edge technology discussions and the sunny California weather. Indeed, a welcome departure for…
One of the goals of the recent RISC-V Summit was to demonstrate that the RISC-V movement is real – major programs by large organizations committing to development around the RISC-V…
A decade-old standard for designing semiconductors called RISC-V is gaining traction as technology companies look at making their own high-performance and specialized chips for artificial intelligence and mobile devices. Read…
MIPS today is RISC-V. Unique to MIPS is that it has figured out a recipe, protecting the strengths of MIPS ISA while leveraging RISC-V to extend and differentiate their cores.…
Embedded hardware specialist Sipeed has unveiled a new carrier for its high-performance Lichee Module 4A (LM4A) RISC-V system-on-module (SOM), and this one's a little unusual: it's the company's answer to…
The Barcelona Supercomputing Center – Centro Nacional de Supercomputación (BSC-CNS) presented the new Sargantana chip, the third generation of open source processors designed entirely at the BSC. The development of…
Overview RISC-V is revolutionizing the semiconductor world with its promise of freedom to innovate and enable specialization, fueling the golden age of semiconductors. The world craves smarter, more specialized devices.…
Oxford United Kingdom, Dec. 12, 2023 (GLOBE NEWSWIRE) -- Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Andes Technology Corporation, a leading supplier of high efficiency, low-power…
The 2024 RISC-V Summit is already in the planning stages, but if you missed attending the 2023 version, then you're in luck. The keynote and technical session videos are available. I was…
Dan is joined by Jack Kang of SiFive. As a member of the founding team at SiFive, Jack oversees the Business Development, Customer Experience, and Corporate Marketing groups. He is responsible…
RISC-V is a fast growing CPU architecture. This talk will give you an overview on what is driving the RISC-V eco-system. We will look into RISC-V profiles and extensions and…
Renesas has announced one of the first independently developed 32-bit RISC-V CPUs. Renesas, long a major player in the industrial MCU and CPU universe, has announced the release of a…
Check out our video recap to see how we plan on keeping the momentum going. We look forward to bringing you exciting updates, collaborations, and info on where you can…
One of the largest vendors of embedded processors has independently developed a CPU core for the 32-bit general-purpose RISC-V market; it can be used as the main CPU or on-chip…
Founded in 2016 and based in Barcelona, Spain, Semidynamics™ is the only provider of fully customizable RISC-V processor IP. The company delivers high bandwidth, high performance cores with vector units…
The increasing popularity of the RISC-V ISA within the semiconductor industry is a boon for innovation. It provides designers with unprecedented flexibility and will slowly but steadily challenge and transform…
Canonical is delighted to announce it is now a member of the RISC-V Software Ecosystem (RISE) to contribute to commercial readiness of open source software for RISC-V. Canonical’s commitment to RISE…
If the recent RISC-V Summit proved one thing it’s that open-source hardware design, and particularly the RISC-V instruction set architecture (ISA) has entered the mainstream. It is a design methodology…
Many have waited years to hear someone like Prahlad Venkatapuram, Senior Director of Engineering at Meta, say what came out this week at the RISC-V Summit: “We’ve identified that RISC-V…
TOKYO, Japan ― Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, announced today that it has designed and tested a 32-bit CPU core based on the open-standard RISC-V…
Uppsala, Sweden; November 28, 2023 – IAR, the world leader in software and services for embedded development, has launched an innovative tool to transform how companies and decision-makers evaluate development tool…
Another RISC-V Summit is behind us. It was a very well-attended event with many exciting talks and companies highlighting their products at the exhibition. One of the main themes was, once again,…
The semiconductor industry has seen RISC-V go from hype to reality, leading us to where we are today. At a time when RISC-V is being used in many vertical markets,…
A little over two years ago an enthusiast managed to make AMD's Radeon RX 6700 XT work on a RISC-V development board under Linux, which was not a particularly easy task.…
In recent years, the RISC-V architecture has gained significant traction amongst a wide variety of chipmakers. It may be less than a decade since the first RISC-V workshops were held,…
As the RISC-V Summit 2023 comes to a close this week, many organizations have announced new innovations and initiatives in the RISC-V community to make the architecture more accessible to new designers. Compared to other…
The AI & automotive industry are both undergoing a major transformation. AI is being used to improve safety, efficiency, and comfort in vehicles, and it is also being used to…
Equipped with RISC-V's powerful Vector ISA and automated customer extension framework, Andes solutions have been adopted in over a dozen innovated datacenter AI/ML accelerators such as Meta’s MTIA first generation…
The human race is entering an era in which digital technology is profoundly transforming every aspect of human life. Digital transformation refers to the use of digital technologies to revolutionize…
In the ever-evolving landscape of RISC-V ISA, binary translation emerges as a critical enabler for its continuous evolution and innovation, effectively managing the potential fragmentation that accompanies the introduction of…
RISC-V has stood on par with x86 and ARM, establishing itself as one of the three leading global instruction sets for the coming several decades, making it the preferred choice…
RISC-V adoption has accelerated across domains, from embedded to enterprise, from automotive to HPC. RISC-V has grown faster than any other architecture in history with both technical and business advantages.…
Hsinchu, Taiwan, Nov. 13, 2023 (GLOBE NEWSWIRE) -- Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V…
With a groundbreaking open-source architecture, RISC-V is paving the way for a new era of computing technology. In this article, we’ll delve into RISC-V’s evolution, its underlying principles and technical…
This blog post reviews the RTOS developed by SYSGO GmbH, PikeOS, and the process for building and integrating an embedded system with PikeOS and Microchip's PolarFire® SoC FPGAs. Read the full article.
As semiconductor industry leaders, Bosch, Infineon, Nordic Semiconductor, NXP, and Qualcomm collaborate to drive the acceleration of automotive RISC-V semiconductors, join us for an insightful webinar on how you too…
In a release, Calista Redmond, CEO of RISC-V International, said, “The biggest takeaway for the RISC-V community this year is that we’re going to see RISC-V everywhere. More and more…
The RISC-V open standard instruction set architecture (ISA) has made significant strides since its introduction in August 2014. According to RISC-V International, it has already been incorporated into more than one billion…
It’s been a banner day here at the Santa Clara Convention Center for the RISC-V Summit. We’ve been treated to many amazing and optimistic keynotes, including one from Prahlad Venkatapuram,…
The age of full-fledged RISC-V data center CPUs is nearly upon us, as Ventana's 192-core Veryon V2 is coming in 2024 (via ServeTheHome). Ventana, founded in 2018, claims the Veryon V2…
SANTA CLARA, Calif.--(BUSINESS WIRE)--Today, at the RISC-V Summit, the OpenHW Group announced the multi-member CORE-V CVA6 Platform project. The platform is an open-source FPGA-based software development and testing environment for RISC-V processors designed…
This year’s annual RISC-V Summit taking place this week in Santa Clara seemed to have a definite buzz around it. What’s apparent is if you were wondering if the architecture…
ARC and Arm are both companies that design and license microprocessor (CPU) architectures. ARC processors are known for their customizability and low power consumption, making ARC an ideal choice for…
Here are the nominees for Best in Show at the 2023 RISC-V Summit North America. Read the full article.
The RISC-V open standard instruction set architecture (ISA) has come a long way since it was introduced in August 2014, and according to RISC-V International, the architecture has already been…
CUPERTINO, Calif. / LONDON – November 7, 2023 – Ventana Micro Systems Inc. and Imagination Technologies today announced a partnership to deliver best-in-class RISC-V SoCs solutions that give customers control over their heterogeneous SoC…
CUPERTINO, Calif. – November 7, 2023 – Ventana Micro Systems Inc. today announced the second generation of its Veyron family of RISC-V processors. The new Veyron V2 is the highest performance RISC-V…
SUNNYVALE, Calif., November 7, 2023 /PRNewswire/ – Synopsys, Inc. (Nasdaq: SNPS) today announced it has extended its ARC® Processor IP portfolio to include new RISC-V ARC-V™ Processor IP, enabling customers to choose from a broad range…
SANTA CLARA, CALIF., November 7, 2023 – Today, at the RISC-V Summit, the OpenHW Group announced the multi-member CORE-V CVA6 Platform project. The platform is an open-source FPGA-based software development and testing environment…
BeagleBoard.org Makes FPGA and RISC-V Accessible with New BeagleV-Fire Single Board Computer at $150
BeagleBoard.org, a pioneer in open-source single-board computers (SBCs), is excited to unveil the BeagleV®-Fire, a revolutionary SBC powered by the Microchip’s PolarFire® MPFS025T FCVG484E 5x core RISC-V System on Chip…
November-7, 2023, RISC-V Summit, Santa Clara, Silicon Valley, California, USA Ashling today announced support for the Synopsys ARC-V RISC-V ISA compliant Processor family. Ashling, as a long-term Synopsys partner for…
Imagination Technologies in the UK has launched a line of high-performance GPU IP with support for DirectX for cloud-based streaming gaming systems The IMG DXD includes a hardware-based implementation of DirectX…
RISC-V originated in academia as a summer project and later turned into a global phenomenon driving a new era of innovation in the semiconductor industry. Today, RISC-V is in more than…
RISC-V Summit, Santa Clara, California — November 7, 2023 -- Semiconductor intellectual property provider CAST today announced that ultra-low-power Wi-Fi chipset developer Ubilite, Inc. has licensed a RISC-V IP core for…
Hsinchu, Taiwan and Stuttgart, Germany – Nov. 6, 2023 – Andes Technology, the renowned supplier of high-efficiency, low-power 32/64-bit RISC-V processors and a Founding Premier member of RISC-V International, and Vector,…
What is RISC-V? CTO Mark Himelstein Explains Its Role in Computer Science – The Electropages Podcast
In this very special episode of the Electropages podcast, host Robin Mitchell gets a chance to talk with Mark Himelstein, Chief Technology Officer of RISC-V International, to explore the ground-breaking…
In a recent release, Imperas Software, a RISC-V simulation solutions company, announced that it has teamed up with Tenstorrent, an AI computing company, to make available a model of the Tenstorrent…
Imperas Software has introduced the latest product updates as a general release to all customers and users. These product updates include the latest models of RISC-V processors, ImperasDV processor verification…
Düsseldorf, 30 October, 2023 – Hyperion Core Joins RISC-V International as a Strategic Member Hyperion Core, the company that brings affordable AI processing to the end-users, has joined RISC-V International, the…
Nov 6th, 2023, RISC-V Summit, Santa Clara, Silicon Valley, California, USA At this year’s RISC-V Summit, we'll showcase our latest tools & solutions for RISC-V, including the following: Our new TraceLLM AI-driven,…
An increasingly digitalized world requires exploring new ways to add intelligence into everything around us. As RISC-V is redefining computing through a collaborative and inclusive ecosystem that provides value for…
Santa Clara, Calif., November 1, 2023 – Today, Sophgo announced that the company has licensed several SiFive RISC-V high performance processor cores, the SiFive Performance P670 and SiFive Intelligence X280 to develop RISC-V AI computing…
Oxford, United Kingdom, November 1, 2023 — Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced the latest product updates as a general release to all customers and…
Oxford, United Kingdom, November 1, 2023 — Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced the latest product updates as a general release to all customers and…
RISC-V is here! So is RISC-V Summit North America 2023, which takes place November 6th-8th in Santa Clara, CA. One of our primary goals for the event this year is to showcase…
RISC-V is growing rapidly in adoption and attention and leading up to the RISC-V Summit, taking place in Santa Clara November 7 and 8, Codasip has introduced its 700 family of…
Munich, Germany, 31 October 2023 – Codasip, the leader in RISC-V Custom Compute, today announced the first commercial implementation of CHERI, the advanced security mechanism the semiconductor industry needs. Capability…
Dan is joined by Calista Redmond, CEO of RISC-V International. Prior to RISC-V International, Calista held a variety of roles at IBM, including vice president of IBM Z Ecosystem where…
Microchip is packing up in Chandler, Arizona and will start its trip to the RISC-V Summit in Santa Clara, California, November 7th and 8th, 2023, and November 6 being Member Day. Microchip will be…
Oxford, United Kingdom, October 30, 2023 — Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Tenstorrent, a next-generation computing company that builds computers for AI, has collaborated with…
S2C announced that the Beijing Institute of Open Source Chip (BOSC) adopted its Prodigy S7-19P Logic System, a VU19P-based FPGA prototyping solution, in the development of the “XiangShan” RISC-V processor.…
Earlier this month, Qualcomm announced it was working with Google on a RISC-V Wear OS chip. The Android team today provided an update on RISC-V adoption, including an initial timeline and emulator support.…
Düsseldorf, 30 October, 2023 – Hyperion Core Joins RISC-V International as a Strategic Member Hyperion Core, the company that brings affordable AI processing to the end-users, has joined RISC-V International, the…
In December of 2022, Google announced at the RISC-V Summit that they were accepting Android patches for RISC-V. On the Google Open Source Blog, Lars Bergstrom & Greg Simon give…
Join us for the next Technology Update featuring informative, technical talks on open source hardware collaborative development. Hosted by Google in Sunnyvale, California, the event includes speakers from Google, Antmicro,…
RISC-V is an open-source instruction set architecture that can be used to develop custom processors. It's challenging not just Intel and AMD but Arm as well. Here are the top…
The ESD Alliance hosted an engrossing evening in the early days of RISC-V featuring two of its authors. At the time, RISC-V was a fledgling concept and it’s doubtful anyone…
October-17, 2023, Chennai, India and Limerick, Ireland. Fabless processor core IP provider InCore Semiconductors and embedded tools developer Ashling today announced support for the Azurite family of RISC-V processor cores…
CHANDLER, Ariz., October 25, 2023, RISC-V Summit — Designers who create systems for the complex Intelligent Edge need flexible, high-performance hardware and system-software combinations that easily handle demanding workloads while meeting…
RISC-V is inevitable - it became the mantra of RISC-V, and it's true. But before we see why that is, let’s step back and discuss what RISC-V is and why…
SemiDynamics in Spain has developed a RISC-V Tensor Unit for AI chip design based on its fully customisable 64bit cores. The RISC-V Tensor unit is integrated into the cache sub-system,…
Barcelona, Spain – 24 October, 2023. Semidynamics has just announced a RISC-V Tensor Unit that is designed for ultra-fast AI solutions and is based on its fully customisable 64-bit cores. State-of-the-art…
Introducing the highly flexible 700 family for unlimited innovation Munich, Germany, 17 October 2023 – Codasip, the leader in RISC-V Custom Compute, announced today a new highly configurable family of…
The security chip (at the middle of the bottom) is built in flip-chip technology on an auxiliary board and plugged into a standard socket on the main board. The main…
When discussing computer hardware, x86, and ARM are household names when discussing microprocessor architecture. They've been around for decades and are still going strong, powering the newest and most powerful CPUs from…
Hsinchu, Taiwan – Oct. 17, 2023 – Andes Technology, the renowned supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier member of RISC-V International, proudly announces the release…
Highlights: Qualcomm and Google are extending their collaboration on wearables by developing a RISC-V Snapdragon Wear™ platform that will power next-generation Wear OS solutions. Work has begun and will continue,…
Qualcomm and Google announced that they had agreed to expand their partnership to development of a Snapdragon Wear platform based on the RISC-V instruction set architecture (ISA) designed for next-generation…
In the ever-evolving landscape of computer architecture, RISC-V stands out as an open-source instruction set architecture that offers flexibility and adaptability. To facilitate learning and exploration of RISC-V assembly language,…
Munich, Germany -- October 17, 2023 – Codasip®, the leader in RISC-V Custom Compute, announced today a new highly configurable family of RISC-V baseline processors for unlimited innovation. The family, called…
Today, technology innovators must have new ways to create differentiated products. How are they supposed to meet the demand for more computational performance when semiconductor scaling laws are showing their limits?…
SiFive has released two new processors, one to target machine learning applications, and one to target general-purpose HPC. The RISC-V movement is one of the hottest things in the computing…
SiFive, a RISC-V processor design firm, unveiled two new chip designs aimed at bringing a high-performance computing solution to various industries. The announcement of the SiFive Performance P870 and SiFive…
Santa Clara, Calif., Oct. 11, 2023 –SiFive, Inc., the pioneer and leader of RISC-V computing today announced two new products designed to address new requirements for high performance compute. The SiFive…
Two relatively new players in the CPU world, Semidynamics and Signature IP, have announced multi-core RISC-V and CHI interconnect IP for compute-intensive applications like AI/ML. As some experts predict the…
Scottsdale, AZ (Oct. 9, 2023) -- Embedded Computing Design (ECD), the leading global media source covering IoT, AI/ML, Security, Power, and Industrial applications, today announced its innovative content opportunities for the…
In the ever-evolving landscape of computer architecture, RISC-V has emerged as an open-source instruction set architecture (ISA), gaining popularity for its simplicity, flexibility, and scalability. One intriguing development in this space…
Researchers at the Swiss public university ETH Zurich have developed Trikarenos, a RISC-V-based microcontroller designed to operate reliably in harsh environments like space. Trikarenos can withstand radiation-induced single event upsets…
The latest Linux kernel patches for enabling the Milk-V Pioneer board have been posted, which is that interesting 64-core RISC-V micro-ATX board with two PCIe x16 slots and more. The…
RISC-V's open source instruction set has attracted a lot of attention over the past few years and not just here on Earth - a team at ETH Zurich in Switzerland…
If you are interested in learning more about how a mini PC can be used for video editing. You might be interested in a new demonstration of the video editing…
The world of computer architecture is constantly evolving, with new innovations reshaping the way we interact with technology. In recent years, one of the most exciting developments has been the…
Semidynamics in Spain has teamed up with SignatureIP in the US to combine multi-core RISC-V IP with CHI interconnect for the development of the latest chiplet AI chips. SignatureIP’s Coherent…
AI chip manufacturing firm, Tenstorrent, has announced a collaboration with Samsung Foundry to develop next-gen cutting-edge chiplets based on its RISC-V architecture. Samsung's Foundry Division Receives a Boost With Tenstorrent Deal For…
SANTA CLARA, CA – Oct. 2, 2023 Tenstorrent, a company that sells AI processors and licenses AI and RISC-V IP, announced today that it selected Samsung Foundry to bring Tenstorrent’s next…
Barcelona, Spain – 3 October, 2023 -- There is an ever-increasing demand for more powerful chip designs for advanced applications, such as AI and ML, that require many cores on one chip. To…
Kdenlive video editing on a Lichee Pi 4A single board computer. Sipeed made it work! This is also the 500th ExplainingComputers video and a celebration thereof. Watch the full video.…
At Codethink we have an increasing interest in the RISC-V architecture, and have, in past years, written several articles related to it, on subjects ranging from fixing a RISC-V kernel space…
CAST BA51 and BA53 IP core customers can now use Ashling’s RiscFree™ SDK to develop and debug systems that use these RISC-V processors Woodcliff Lake, New Jersey and Limerick, Ireland — September…
In this roundup, we review the ways RISC-V is making its mark in the computing world—from small-scale gaming projects to large-scale corporate initiatives. While the royalty-free RISC-V instruction set architecture…
OTTAWA, Canada – September 20, 2023 - OpenHW Group, a global consortium driven by its members and contributors, is pleased to announce the appointment of Florian ‘Flo’ Wohlrab as its new…
In the world of system-on-chip (SoC) devices, architects encounter many options when configuring the processor subsystem. Choices range from single processor cores to clusters to multiple core clusters that are…
TL-Verilog has the promise to help humans and LLMs collaborate effectively and safely on digital circuits. But first, we need to teach LLMs TL-Verilog. I explore the ability of today's…
