Andes Technology Corporation, the leading supplier of high performance, low-power and small embedded CPU cores, has created a RISC-V core licensing project and has signed joint promotion agreements to form a multinational design service alliance with several top ASIC/SoC design service companies. The alliance is expected to continue expanding eventually reaching 20 or more companies globally in the following several months. Now the alliance in alphabetical order includes ASIC Land in Korea, SiEn (Qingdao) Semiconductor in China, and XtremeEDA in USA and Canada. These companies will use the RISC-V ISA (instruction set architecture) based processor cores authorized by Andes to provide design service with RISC-V total solutions to end customers.
RISC-V, an open instruction set architecture (ISA) originally developed by UC Berkeley, is compact, modular, and extensible. Because of its flexibility and open source architecture, the RISC-V ecosystem continues to rapidly expand. With the RISC-V Foundation formation, a large and growing number of leading system and chip design companies have joined the RISC-V team and RISC-V technology continues to evolve. Applications including ADAS, AI, IoT, Networking, Storage and other emerging technology along with an ecosystem with unlimited potential for future growth is driving RISC-V towards an ever expanding future.
To read more, please visit: https://globenewswire.com/news-release/2018/08/08/1549127/0/en/Andes-Technology-forms-a-Multinational-Alliance-with-ASIC-Design-Service-Companies-to-Provide-RISC-V-Total-Solutions.html