Wasiela Brings Encryption, FEC And Connectivity IP To DesignShare

SiFive, the leading provider of commercial RISC-V processor IP, today announced that Wasiela, a provider of innovative PHY-layer IP from the system and algorithmic levels all the way to implementation, has joined the DesignShare ecosystem. The availability of Wasiela encryption, forward error correction (FEC) and connectivity IP through the program will ease the development of reliable and secure high-throughput data communications for the RISC-V platform.
Specific IP Wasiela plans to make available through DesignShare’s secure ecosystem includes its AES IP core and ECC for encryption; BCH, Reed Solomon, LDPC and Turbo Encoders/Decoders for FEC; and ZigBee Transceiver PHY and OFDM-based cores for connectivity. All Wasiela cores serve as accelerators or slave peripherals to RISC-V processors and are easily integrated via the TileLink interface.
“RISC-V represents a new wave of growth and innovation in the semiconductor industry, and we are excited to join SiFive in the DesignShare ecosystem,” said Ahmed Shalash, President, Wasiela. “Wasiela enables system designers to incorporate leading IP to ensure the quality and consistency of data communications for consumer electronics on any platform, now including RISC-V.”
 
To read more, please visit: https://www.sifive.com/posts/2018/09/13/wasiela-brings-encryption-fec-and-connectivity-ip-to-designshare/.