The RISC-V Foundation has announced the launch of a design contest, in partnership with Google, Antmicro, and Microchip, which will see entrants competing to build the smallest and fastest RISC-V soft core implementations on field-programmable gate arrays (FPGAs).
One of the biggest benefits of free and open source silicon (FOSSi) is that you are able to tweak and tailor its design to suit your own needs. To help demonstrate this, the RISC-V Foundation’s design contest is seeking engineers willing to create 32-bit RV32I soft cores and implement them on Microsemi SmartFusion 2, Igloo 2, or Lattice iCE40 UltraPlus FPGA development boards. Each entry will be judged based on two key metrics: size in terms of resource usage, with performance as a tie-breaker; and raw performance in the Dhrystone benchmark.
To read more, please visit: https://abopen.com/news/risc-v-foundation-launches-soft-cpu-design-contest/.
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