The 2019 Design and Verification Conference and Exhibition U.S. (DVCon U.S.), sponsored by Accellera Systems Initiative (Accellera), concluded its 31st annual event last week with attendees filling rooms to learn more about machine learning, Portable Stimulus, multi-platform verification, what “digital twin” means and more. The DVCon Expo was sold out this year with 32 exhibitors filling the ballroom.
Overall attendance, including exhibit-only and technical conference attendees, was 873. Attendance was further enhanced by 240 exhibitor personnel that also had access to the panel sessions and keynote address, for a total of 1,113 participants.
There were two panels on Wednesday. The first panel, “Verification and Compliance in the Era of Open ISA – Is the Industry Ready to Address the Coming Tsunami of Innovation?” explored the hot topic of the RISC-V instruction set architecture, its features and benefits as well as the challenges for processor IP and SoC development and verification. The second panel, “Deep Learning –– Reshaping the Verification Landscape or Business as Usual?” had a packed ballroom of attendees learning about the next steps for AI and machine learning and how they will reshape the semiconductor industry.
To read more, please visit: https://globenewswire.com/news-release/2019/03/05/1748228/0/en/DVCon-U-S-2019-Announces-Stuart-Sutherland-Best-Paper-Best-Poster-Winners-Attendance-Numbers.html.