Creating a new chip architecture is becoming an increasingly complex series of tradeoffs about memories and processing elements, but the benefits are not always obvious when those tradeoffs are being made.
This used to be a fairly straightforward exercise when there was one processor, on-chip SRAM and off-chip DRAM. Fast forward to 7/5nm, where chips are being developed for AI, mobile phones and servers, and there are hundreds or even thousands of processing elements connected on a single die or in a complex package. In many of these chips there are a mix of processor types—small FPGAs, embedded FPGAs, DSPs, as well as various sizes of processing cores based on Arm, MIPS, RISC-V or x86 ISAs. There are also AI cores such as Tensor processing units, as well as some custom processing circuitry.
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