The now validated RISC-V base modules RV32I, RV64I, and RVWMO (RISC-V Weak Memory Ordering) form the basic interface between the application software and the hardware. Developed on the basis of a codified simple instruction set architecture and modular standard extensions, they avoid fragmentation of the platform and keep the door open for future expansion.
In addition, they ensure a high degree of interoperability between different implementations. By releasing the specifications for various modules of the open instruction set architecture RISC-V, the RISC-V Foundation lays the base for further growth of the open-source ecosystem.
To read more, please visit https://www.elektronikpraxis.vogel.de/risc-v-foundation-ratifiziert-spezifikationen-fuer-basis-und-privilegierte-architekturen-a-855536/. Please note that the original article is in German.