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RISC-V Foundation Announces The Agenda For Its Inaugural RISC-V Summit

By October 1, 2018October 1st, 2020No Comments
The RISC-V Foundation, a nonprofit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), today announced the agenda for its first annual RISC-V Summit at the Santa Clara Convention Center in Santa Clara, Calif., taking place Dec. 3-6, 2018. The Summit, in partnership with Informa’s Knowledge & Networking Division, KNect365, will gather the RISC-V ecosystem for a multi-track technical conference featuring keynotes, tutorials, exhibitions and networking receptions.
Keynotes will feature speakers from Antmicro, Facebook, Microchip, NXP, SiFive, Western Digital and more:
Tuesday, Dec. 4, 2018:

Wednesday, Dec. 5, 2018:

Tuesday, Dec. 4, 2018:

Wednesday, Dec. 5, 2018:

The Summit’s Exhibit Hall will be open Tuesday, Dec. 4 (10 a.m. to 7 p.m. PST) and Wednesday, Dec. 5 (10 a.m. – 3:30 p.m. PST) to showcase RISC-V-based product demonstrations and allow attendees to explore the latest innovations on the market. The Summit will officially open on Monday, Dec. 3 with a Welcome Party (5 – 7 p.m. PST) hosted by Ashling.
Promotional pricing for the three-day Conference and Exhibition Pass has been extended until Monday, Oct. 29. Platinum, Gold and Silver level members of the RISC-V Foundation qualify for discount codes. Please contact for your member discount code. To learn more about the packages and limited-time promotions, please visit:
Sponsorship packages, media partnerships and exhibition packages are also available, see details here.
For press interested in attending, please email: to receive your complimentary pass.
About RISC-V Foundation
RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V Foundation comprises more than 100 member organizations building the first open, collaborative community of software and hardware innovators powering innovation at the edge forward. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V Foundation have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.


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