Next week, the RISC-V ecosystem will gather together for the RISC-V Workshop Zurich. The event will feature two full days of talks and one day of member meetings.
The 40+ sessions will discuss the RISC-V architecture, commercial and open-source implementations, software and silicon, vectors and security, applications and accelerators, simulation infrastructure and much more. You can check out the action-packed agenda here. If you don’t have a ticket for this sold out event, stay tuned for the presentation slides and videos which will be posted following the Workshop.
Sponsors
A special thanks to lead sponsor OpenHW Group, gold sponsor Microchip Technology and supporting sponsor Codasip.
Table Tops
Thanks to the following companies for exhibiting at the table tops: Antmicro, AdaCore, Calligo Technologies, Gowin, GreenWaves Technologies, IAR Systems, Imperas, Inno Logic, QuickLogic, SiFive, Syntacore, UltraSoC, Valtrix Systems, Western Digital and WolfSSL.
Lunch Sponsor
A shout-out to Gradient, the event lunch sponsor.
Host
Finally, thanks to ETH Zurich for hosting the event!