The RISC-V open standard instruction set architecture (ISA) has made significant strides since its introduction in August 2014. According to RISC-V International, it has already been incorporated into more than one billion…
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It’s been a banner day here at the Santa Clara Convention Center for the RISC-V Summit. We’ve been treated to many amazing and optimistic keynotes, including one from Prahlad Venkatapuram,…
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The age of full-fledged RISC-V data center CPUs is nearly upon us, as Ventana's 192-core Veryon V2 is coming in 2024 (via ServeTheHome). Ventana, founded in 2018, claims the Veryon V2…
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SANTA CLARA, Calif.--(BUSINESS WIRE)--Today, at the RISC-V Summit, the OpenHW Group announced the multi-member CORE-V CVA6 Platform project. The platform is an open-source FPGA-based software development and testing environment for RISC-V processors designed…
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This year’s annual RISC-V Summit taking place this week in Santa Clara seemed to have a definite buzz around it. What’s apparent is if you were wondering if the architecture…
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ARC and Arm are both companies that design and license microprocessor (CPU) architectures. ARC processors are known for their customizability and low power consumption, making ARC an ideal choice for…
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Here are the nominees for Best in Show at the 2023 RISC-V Summit North America. Read the full article.
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The RISC-V open standard instruction set architecture (ISA) has come a long way since it was introduced in August 2014, and according to RISC-V International, the architecture has already been…
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CUPERTINO, Calif. / LONDON – November 7, 2023 – Ventana Micro Systems Inc. and Imagination Technologies today announced a partnership to deliver best-in-class RISC-V SoCs solutions that give customers control over their heterogeneous SoC…
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CUPERTINO, Calif. – November 7, 2023 – Ventana Micro Systems Inc. today announced the second generation of its Veyron family of RISC-V processors. The new Veyron V2 is the highest performance RISC-V…
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