anisha

has created something truly impressive — a working RISC-V CPU completely contained in a Terraria world. And then for added fun, he wrote the game of pong, playable in real time,…

Oxford, United Kingdom, July 10th, 2023 — Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Cadence Design Systems, Inc. (Nasdaq: CDNS) has collaborated with Imperas to enable NSITEXE,…

RISC-V, a free and open source instruction-set architecture (ISA), has gained significant traction from both industry giants and emerging startups. A simple, scalable design, coupled with the ability to customize…

RISC-V has seen significant momentum during the past year. According to RISC-V International there are over 10 billion RISC-V cores on the market, with thousands of engineers working on RISC-V…

Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced its participation at DAC 60 with panels and presentations, and exhibits and live demos at its booth 2336.…

As microchips increasingly become an integral part of our lives, share prices for many companies that make them are rising fast. Last week shares of NVIDIA Corp (NVDA) jumped over 30%,…

Mark Himelstein, chief technology officer at RISC-V International, joins us to discuss the latest developments with the RISC-V instruction set architecture and its growing community and footprint. Topics include: HPC use…

At the recent SiFive RISC-V China Technology Forum that took place in Shenzhen, China, SiFive chief architect and the chairman of RISC-V International Krste Asanović noted that the momentum of…

Here at Codasip we’re passionate about reducing the code size of our RISC-V cores for our customers, but why? Are we not making the core larger and more complex as…