Esperanto, Google, SiFive and Western Digital. The CHIPS Alliance is committed to both open source hardware and continued momentum behind the free and open RISC-V (pronounced risk-five) architecture. RISC-V is an initiative to create an open instruction set architecture. Some chips, such as Intel’s x86, use complex instruction set computing (CISC) architecture. And some chips, including many Arm-based chips, use reduced instruction set computing (RISC). The RISC-V group adopts the RISC nomenclature, adding the Roman numeral V. RISC-V hopes to enable a new era of processor innovation through open collaboration on an open source instruction set. To read more, please visit: https://www.fiercewireless.com/tech/open-source-silicon-project-innovates-chips-communications-networks.]]>