CNX Software Article: Linux 5.2 Release – Main Changes, Arm, MIPS & RISC-V Architectures

SiFive’s L2 cache controller has been merged, which should unblock the EDAC framework work and adds support for the RISC-V architecture to the nolibc header file   To read more, please visit https://www.cnx-software.com/2019/07/11/linux-5-2-release-main-changes-arm-mips-risc-v-architectures/.]]>