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RISC-V Half-Day at RISE

December 17 @ 12:00 pm - 4:00 pm

We are excited to invite you to join RISE SICS for an engaging and insightful meeting dedicated to RISC-V, the open standard instruction set architecture (ISA) shaping the future of computing. This gathering will bring together key players from the Swedish RISC-V industry, researchers, and other stakeholders interested in RISC-V.

The meeting is from 12:00 – 16:00 on the 17th of December 2024 in Kista, Isafjordsgatan 28A, Bergmansalen.

Preliminary Agenda

12:00 – 13:00 Lunch
Short intro by Björn Forsberg and Joakim Eriksson (RISE)
Presentations (Antmicro, IAR Systems, RISE, etc.)
Discussions on how to create more interest in Sweden for RISC-V and potential innovation projects
Summary and ending (around 16:00)

If you are interested in joining, please get in touch with Joakim Eriksson (joakim.eriksson@ri.se, 070-3213841).

Details

Date:
December 17
Time:
12:00 pm - 4:00 pm
Event Category: