RISC-V Senior Verification Engineer
Website SEMIDYNAMICS TECHNOLOGY SERVICES, S.L.
European supplier of RISC-V IP cores
We are an European supplier of RISC-V IP cores, specializing in high-performance, high-bandwidth cores with vector units for machine learning and artificial intelligence applications and we are looking for a Senior Verification Engineer.
As senior digital verification engineer you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, ARM & CPU architecture, PCIe protocols and machine learning both in current and raw projects.
- Masters or PHD degree in Electronics / Microelectronics or similar field.
- 5+ years’ experience in complex projects
- UVM environments & processes
- System Verilog for IP / SOC Verification of digital ICs / ASIC IP or chips
- Complex ASIC designs & architecture for advanced technology nodes
- RISC-V / CPU / GPU knowledge (is a bonus, but not required)
- Verification Metrics definition, Coverage analysis and debugging skills.
- Knowledge and experience on setting up an ASIC Verification environment, methodology and flow.
- vManager, vPlan and Regressions, etc.
- Digital Test Plan definition / creating / set-up test benches
- scripting / coding skills – C/C++, python etc.
- Knowledge of SOC verification is also a bonus
What we offer:
This is an in-office stable position, with indefinite contract. Apart from a great professional project and an attractive remuneration package, we are a multicultural young team. Good working environment; coffee, fruit and kitkats at your disposal.
Visa sponsorship and relocation support can be offered if required (dependent on experience/qualifications)
To apply for this job email your details to firstname.lastname@example.org