RISC-V (pronounced RISC Five) instruction set architecture (ISA), Microsemi provides tools and RISC-V soft cores for its various FPGA lines, including the recently unveiled Mi-V (pronounce My Five) ecosystem. Mi-V further streamlines RISC-V development by giving software developers a starting point that’s able to bypass the FPGA design process, while offering FPGA developers an easier starting point for RISC-V-based designs. To read the full article, please visit: http://www.electronicdesign.com/embedded-revolution/risc-v-fpga-design-leaps-forward-mi-v]]>