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Design & Reuse Article: UltraSoC And Lauterbach RISC-V Collaboration Furthers Vendor-neutral Debug And Development Environment

By February 20, 2018No Comments

 UltraSoC and Lauterbach today extend their collaboratively delivered universal SoC (system on chip) development and debug environment with the addition of support for the RISC-V open-source processor architecture. The inclusion of RISC-V continues the companies’ commitment to support all of the industry’s major processor architectures, and to provide best-in-class development tools for designers of heterogeneous systems that employ CPUs from multiple vendors. To read more, please visit: https://www.design-reuse.com/news/43581/ultrasoc-lauterbach-risc-v-vendor-neutral-debug-development-environment.html?utm_campaign=43581&utm_medium=website&utm_source=twitter]]>