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Australian Innovation To Enhance Security Of Billions Of Connected Devices

By April 18, 2018May 12th, 2021No Comments

Data61 has today released an initial version of seL4 for RISC-V (pronounced risk-five), a free and open Instruction Set Architecture (ISA*) enabling a new era of processor innovation through open standard collaboration.
Future versions of the seL4 microkernel will fully support the RISC-V architecture. The RISC-V Foundation has significant backing from over 100 members including major industry players such as IBM, Google, Microsemi, Qualcomm, Samsung, Western Digital and many more.
CSIRO has joined the RISC-V Foundation to participate in ongoing work and contribute to the RISC-V ISA specification with the aim of enhancing overall security.

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