Andes Technology Corp. To Present At The TSMC OIP Theater During Design Automation Conference 2018 To Feature New RISC-V CPU Cores In Booth 2658

WHO:  Andes Technology Corporation, the leading Asia-based supplier of small, low-power, high performance 32/64-bit embedded CPU cores, today announced that it will present in the TSMC OIP Theater during the 2018 Design Automation Conference. The company will exhibit its latest RISC-V CPU IP cores in booth 2658.
WHAT:  Andes Technology Corporation Field Application Engineer, I-Tao Tsai will present” Taking RISC-V to Mainstream ASICs.”
WHEN:   Andes FAE I-Tao Tsai will present Monday June 25^th from 3:15pm to 3:30pm and Wednesday June 27^th from 5:15pm to 5:30pm.
WHERE: Andes FAE I-Tao Tsai will present in the TSMC OIP Theater in TSMC Booth # 1629, during the Design Automation Conference, in Moscone Center West, 747 Howard St, San Francisco, CA 94103. To schedule a meeting e-mail info@andestech.com.
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