Open-Silicon, a system-optimized custom SoC solution provider and long-standing member of TSMC’s Value Chain Aggregator (VCA) and Design Center Alliance (DCA) programs, and Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology, will participate in a joint demonstration at the TSMC 2018 Open Innovation Platform Ecosystem Forum and Technology Symposium in Amsterdam, The Netherlands. These demonstrations will illustrate the capabilities of Open-Silicon’s High Bandwidth Memory (HBM2) IP subsystem and Credo’s 56G SerDes IP in enabling deep learning and networking applications. Visitors will also learn about other critical IP cores required for these applications, including a RISC-V based CPU subsystem, and Interlaken IP and Ethernet IP subsystems.
To read more, please visit: https://globenewswire.com/news-release/2018/07/19/1539357/0/en/Open-Silicon-and-Credo-Demonstrate-Solutions-for-Deep-Learning-and-Networking-Applications-at-TSMC-OIP-and-Symposium-in-Amsterdam.html.